Hardware AI Chip Architect
FuriosaAIJob Title
Hardware AI Chip Architect
Role Summary
Design and implement microarchitecture and RTL for AI accelerator chips, owning one or more modules from specification through verification and PPA optimization. Collaborate with hardware and architecture teams to meet functionality, performance, power, and area targets.
Experience Level
Entry-level (2+ years of industry experience)
Responsibilities
Primary responsibilities include:
- Define architecture and microarchitecture specifications and take ownership of one or more chip modules.
- Implement modules in RTL (SystemVerilog or other HDLs) and iterate designs for optimal power, timing, and area.
- Drive convergence of functionality and PPA targets.
- Create testbenches and debug complex logic simulations.
Requirements
Must-have:
- 2+ years of industry experience in chip design, specializing in RTL design (architecture and implementation), logic synthesis, verification, and timing closure.
- Experience implementing microprocessor simulators in C++ or other high-level languages.
- Experience modeling power, performance, and area (PPA).
- Experience with scripting languages to automate simulation and analysis.
Nice-to-have:
- Experience in accelerator design.
- Experience with highly pipelined and multi-clock-domain designs.
- Knowledge of machine learning algorithms, compilers, processor/accelerator design, or memory hierarchies.
- Experience with Chisel or RISC-V.
Education Requirements
Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience required. Ph.D. in Electrical Engineering or Computer Science is a plus. Fields explicitly mentioned: Electrical Engineering and Computer Science. Equivalent practical experience is accepted.
About the Company
Company: FuriosaAI
Headquarters: Seoul, South Korea
FuriosaAI develops high-performance, energy-efficient AI inference hardware and software. Founded in 2017 by semiconductor and AI engineers, the company builds AI-native compute platforms to reduce AI energy and operational costs and operates globally with offices in Korea, Silicon Valley, and an R&D lab in Lisbon.
