GPU STA/Timing Engineer (Senior Lead/Staff)
QualcommJob Title
GPU STA/Timing Engineer (Senior Lead/Staff)
Role Summary
Drive block-level and full-chip static timing analysis (STA) signoff and timing closure for next-generation high-performance GPU designs. Work closely with Architecture, RTL, Physical Design, DFT, and SoC teams to identify and resolve timing, SI, and low-power issues and to improve signoff flows and automation.
Experience Level
Senior-level. Targeted experience: approximately 6–10 years in ASIC/SoC STA and timing signoff.
Responsibilities
Key responsibilities focus on timing signoff, closure, methodology, and cross-functional coordination.
- Own block-level and full-chip STA signoff for GPU designs.
- Develop, validate, and maintain timing constraints (SDC) and signoff flows.
- Perform multi-corner multi-mode timing analysis (MCMM/MMMC), timing closure, and ECO implementation.
- Drive setup/hold, noise, signal integrity (SI), and low-power timing closure activities.
- Collaborate with Architecture, RTL, Physical Design, DFT, and SoC teams to resolve timing issues.
- Enhance STA methodologies and automation to improve signoff quality and turnaround.
- Provide technical leadership and mentor junior engineers.
Requirements
Must-have technical skills and experience for immediate contribution.
- 6–10 years of hands-on experience in ASIC/SoC STA and timing signoff (block and full-chip).
- Strong expertise in STA techniques, MCMM/MMMC timing analysis, timing closure, and ECOs.
- Experience authoring and validating timing constraints (SDC).
- Practical experience with Synopsys PrimeTime for signoff analysis.
- Knowledge of SI analysis, SOCV/AOCV flows, and noise-related timing issues.
- Solid understanding of Physical Design concepts and implementation flows.
- Proficiency in scripting (Tcl, Python) for automation and flow integration.
- Proven ability to drive cross-functional debugging and closure activities; experience mentoring engineers.
Nice-to-have:
- Experience with GPU, CPU, AI/ML, or other high-performance SoC designs.
- Experience with advanced process nodes (5 nm and below).
- Familiarity with Fusion Compiler, ICC2, StarRC, Tempus, Innovus, or similar EDA tools.
Education Requirements
Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, or related engineering fields are cited. Minimum-qualification equivalencies listed: Bachelor's +4 years relevant hardware engineering experience, Master's +3 years, or PhD +2 years. (Education items moved here from other sections.)
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
