GPU Design Implementation Engineer

Job Title

GPU Design Implementation Engineer

Role Summary

The Design Implementation Engineer will join Qualcomm's Adreno GPU team to integrate, implement and deliver GPU cores. This hands-on role focuses on front-end implementation, RTL synthesis, and methodology to meet aggressive Power, Performance and Area (PPA) targets.

The engineer will collaborate closely with graphics microarchitecture, RTL and physical design teams, support tape-outs, and drive new flows and methods to improve PPA.

Experience Level

Mid-level. Typical candidates have multiple years of front-end implementation experience (commonly ~4–6 years) working with RTL synthesis, timing signoff, and ASIC tape-out flows.

Responsibilities

Core responsibilities include implementation, collaboration, and delivery of GPU designs with a focus on PPA and manufacturability.

• Perform front-end implementation and RTL synthesis for GPU subsystems.
• Use industry EDA tools for synthesis, formal checks, and timing analysis to achieve signoff-quality results.
• Collaborate with microarchitecture and RTL designers to identify and resolve performance and power bottlenecks.
• Work with physical design teams to support tape-outs and ensure PPA targets are met.
• Develop and deploy implementation methodologies and automation to improve design quality and turnaround.
• Debug complex issues across RTL, timing, and implementation flows; perform root-cause analysis.
• Write and maintain scripts and flows (Tcl/Perl/Python) to support synthesis and signoff flows.
• Communicate results and trade-offs clearly to cross-functional teams; participate in design reviews.

Requirements

Below are condensed must-have and nice-to-have technical requirements. Education requirements are summarized separately in the Education Requirements section.

• Experience with digital design and RTL synthesis and familiarity with synthesis flows.
• Experience using front-end EDA tools such as Synopsys next-generation tools, Conformal LEC, Synopsys Formality, and Synopsys PrimeTime.
• Strong understanding of CMOS circuit design and techniques to optimize power, performance, and area.
• Hands-on experience with synthesis, place-and-route, and signoff tools; experience with tape-outs at advanced nodes (<10nm).
• Solid scripting skills (Tcl, Perl, or Python) for flow automation and debugging.
• Strong analytical, debugging, and communication skills for cross-team collaboration.

• Hands-on physical design/implementation experience.
• Experience with sub-micron nodes (5nm, 4nm) and familiarity with FINFET/GAA technologies.
• Background in graphics design/development and GPU micro-architecture.
• Experience leading teams to achieve aggressive PPA targets.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field are referenced. The posting allows equivalent practical experience in place of a degree via alternative minimum-qualification clauses (e.g., Bachelor's + 2+ years, Master's + 1+ year). Specific degree-to-experience mappings were provided in the source.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.