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GPIO Circuit Design Engineer

GlobalFoundries
June 23, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Semiconductor IP Jobs, Level - Mid-Career

Job Title

GPIO Circuit Design Engineer

Role Summary

Responsible for end-to-end development, delivery, and characterization of IO IPs (GPIO, LVDS, SSTL, HSTL, MIPI, etc.) across process nodes. Works with architecture, circuit design, verification, layout, and test teams to meet performance, power, area, and reliability targets.

Experience Level

Mid-level β€” requires about 3+ years of semiconductor IP design experience.

Responsibilities

The role focuses on IO IP design, verification, and post-silicon validation. Key responsibilities include:

  • Design circuit blocks for IO IPs and define IO IP architecture in collaboration with system and product teams.
  • Perform circuit simulations, verification, and reliability analysis to meet PPA targets.
  • Collaborate on test-chip planning, test board design, packaging, post-silicon testing, and qualification activities.
  • Supervise layout engineers to ensure timely, high-quality layout delivery and integration with physical verification flows.
  • Support RTL-related activities including Verilog/VHDL integration, synthesis, and timing closure where applicable.
  • Perform market and competitive analysis to inform product definition and IO feature sets.
  • Follow Environmental, Health, Safety & Security requirements in all activities.

Requirements

Must-have skills and experience follow; items labeled "Nice-to-have" are preferred but not required.

  • Must-have: 3+ years of semiconductor IP design experience focused on digital and mixed-signal IO design principles.
  • Must-have: Strong understanding of RTL (Verilog/VHDL), synthesis flow, and timing closure.
  • Must-have: Familiarity with ESD protection, pad ring design, and physical verification flows.
  • Must-have: Good communication and project-management skills; ability to work across design, layout, and test teams.
  • Nice-to-have: Experience with high-speed I/O design and knowledge of low-power IO techniques.
  • Nice-to-have: Experience with silicon validation, lab debug tools, and post-silicon bring-up.
  • Nice-to-have: Prior responsibility for GPIO or similar IO IP blocks and awareness of process-technology impacts on circuit design.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related technical field, or equivalent practical experience.


About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.

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Date Posted: 2026-06-22