Job Title
Functional Safety Architect
Role Summary
Lead and own device-level functional safety architecture for semiconductor devices and IP across Avionics, Space, Defense, Automotive, and Industrial markets. Develop technical safety concepts and mechanisms, allocate decomposed safety requirements to IP sub-blocks, and coordinate cross-functional teams to achieve safety certification.
Drive compliance with functional safety standards (ISO 26262, IEC 61508, and relevant avionics standards such as DO-254/DO-178) and produce defensible safety-case evidence for assessors and stakeholders.
Experience Level
Senior — role expects experienced candidates (the posting indicates multi-year expertise; see Education Requirements for specific combinations).
Responsibilities
Main duties include:
- Define and own device safety architecture and safety mechanisms (e.g., lockstep CPUs, ECC, watchdogs, redundancy).
- Perform safety analyses using FTA, FMEA/FMEDA, DFA and related methodologies to address CCF/CF, fault tolerance, and independence.
- Decompose ASIL/SIL requirements and allocate safety requirements to IP and subsystem owners.
- Review hardware and software safety designs for compliance and feasibility.
- Collaborate with verification teams to define V&V strategies (fault injection, fault simulation, test methods) and achieve diagnostic coverage metrics (SPFM, LFM, PMHF).
- Document and present safety case evidence with clear traceability for assessors and stakeholders.
- Serve as safety manager on projects when required and support process activities to achieve systematic capability (e.g., SIL3/ASIL D).
Requirements
Must-have and preferred experience and skills:
- 7+ years of functional safety professional experience, including practical device certification work for ASICs/PLDs/CPUs with organizations such as Exida or TÜV (or equivalent).
- Proven experience applying safety-analysis methods (FTA, FMEA/FMEDA, HAZOP) and working with SysML and requirements-management tooling (e.g., Jama).
- Experience defining safety V&V strategies and executing fault-injection and fault-simulation activities.
- Strong ability to work across abstraction levels from system architecture to implementation details.
- Excellent written and verbal communication skills for constructing evidence-based safety arguments and engaging with internal and external stakeholders.
- Nice-to-have: familiarity with RTL coding/simulation, hands-on experience creating safety documents (safety cases, management plans, manuals), functional safety management experience for SC3/ASIL D, and U.S. citizenship.
Education Requirements
Bachelor’s or Master’s degree in Electrical Engineering or a related field. Posting specifies either a Bachelor’s plus 10+ years of silicon-industry experience or a Master’s plus 8+ years of silicon-industry experience. Additionally, candidates are expected to hold or obtain functional-safety certifications (examples cited: FSCP, FS Professional license) and have experience certifying devices with bodies such as Exida or TÜV (or equivalent).
About the Company
Company: Altera
Headquarters: Bengaluru, Karnataka, India
Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

Date Posted: 2026-07-17