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Front-End Power Engineer

Etched
July 29, 2026
Full-time
On-site
Cupertino, California, United States
RTL Design Jobs, Level - Mid-Career

Job Title

Front-End Power Engineer

Role Summary

Design and optimize RTL to meet chip power, performance, and area targets. Work on power analysis and low-power RTL techniques across synthesis, P&R, and sign-off phases as part of a tightly integrated ASIC engineering team based in Cupertino.

Experience Level

Mid-level. Years of experience not specified in the source.

Responsibilities

Primary day-to-day responsibilities include:

  • Optimize RTL to improve power efficiency while meeting performance and area goals.
  • Perform power analysis during RTL, synthesis, and gate-level stages; apply RTL power-reduction techniques such as clock gating, power gating, multi-voltage domains, and dynamic voltage scaling.
  • Estimate power and evaluate PPA trade-offs for new and existing features.
  • Collaborate with physical design (P&R) and sign-off teams to ensure power targets are met through implementation.
  • Create power models from RTL simulations and gate-level netlists and perform chip-level power roll-up under different operating conditions.

Requirements

Must-have and helpful skills for the role.

  • Must-have: RTL development experience with Verilog/SystemVerilog focused on low-power design and optimization.
  • Must-have: In-depth knowledge of low-power techniques (clock gating, power gating, DVFS) and how to apply them in RTL.
  • Must-have: Familiarity with synthesis and place-and-route flows with attention to power optimization.
  • Nice-to-have: Experience with UPF/CPF power intent specifications.
  • Nice-to-have: Familiarity with power analysis tools (Synopsys PrimePower, Cadence Joules, or similar).
  • Nice-to-have: Automation/scripting skills for power analysis and optimization (Tcl, Perl, Python).

Education Requirements

Not specified.


About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.

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Date Posted: 2026-07-22