Front End Design Verification Engineer

Job Title

Front End Design Verification Engineer

Role Summary

Verify the instruction-fetch and front-end pipeline for a high-performance out-of-order RISC-V CPU core. Develop verification strategies, build tests and testbenches, debug failures, and work with CPU architects and RTL designers to ensure correctness and performance across workloads.

Experience Level

Mid-level - requires approximately 6+ years of design verification experience for CPUs, SoCs, ASICs, or other complex digital designs.

Responsibilities

Work on verification of the processor front end from fetch/prediction through decode and dispatch, ensuring correct behavior across functional and corner cases.

• Design verification plans and strategies for the fetch unit and front-end pipeline.
• Implement UVM/SystemVerilog testbenches, constrained-random tests, assertions, and functional coverage.
• Create targeted directed and randomized tests to exercise corner cases such as speculative execution, redirects, and exceptions.
• Debug RTL and simulation failures using waveforms and standard simulation/debug tools.
• Collaborate closely with CPU architects, RTL designers, and software teams to reproduce and resolve issues.
• Analyze coverage results and drive closure of verification gaps.
• Maintain and extend verification infrastructure and test suites.

Requirements

Must-have technical skills and experience required to perform the role; a short list of desirable additional skills follows.

• Must-have: 6+ years of design verification experience for CPUs, SoCs, ASICs, or equivalent complex digital designs.
• Must-have: Strong SystemVerilog and UVM experience, including constrained-random testing, assertions, functional coverage, and testbench development.
• Must-have: Solid understanding of CPU front-end concepts (instruction fetch, branch prediction, decode, queues, dispatch, pipelines, out-of-order and speculative execution).
• Must-have: Experience debugging RTL and simulation failures with waveforms and simulation/debug tools.
• Must-have: Strong programming skills in C/C++ and/or Python and ability to collaborate across architecture, RTL, DV, and software teams.
• Nice-to-have: Prior work on RISC-V cores, high-performance out-of-order CPUs, or SoC verification.
• Nice-to-have: Familiarity with verification environments used for AI/HPC-targeted processors.

Education Requirements

Not specified.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.