FPGA Verification Engineer

Job Title

FPGA Verification Engineer

Role Summary

The FPGA Verification Engineer will join the Imaging team to design and verify FPGA-based imaging and perception hardware for defense systems. You will collaborate with cross-functional hardware and software teams to develop verification environments, testbenches, and validation plans, and support prototype-to-product maturation.

Experience Level

Senior — requires substantial experience; the posting specifies 8+ years of relevant FPGA/HDL development and verification experience.

Responsibilities

Primary responsibilities focus on RTL verification, test infrastructure, and leadership of verification activities.

• Architect and design verification environments using SystemVerilog and verification methodologies (OVM/UVM).
• Create written test plans, test cases, and track code and functional coverage.
• Develop testbenches for RTL block verification using VHDL or SystemVerilog.
• Apply constrained-random testing, functional coverage analysis, and assertion-based verification.
• Recommend and integrate tools and practices to improve ASIC/FPGA verification flow.
• Contribute engineering estimates for program proposals and provide technical leadership for verification teams (task breakdown, planning, status reporting).

Requirements

Must-have technical requirements are listed first; preferred skills are listed separately.

• Must-have: 8+ years developing HDL firmware for FPGA devices; professional experience developing and simulating RTL using VHDL and/or Verilog.
• Must-have: Proven ability to design, implement, and execute verification testbenches using VHDL and/or SystemVerilog.
• Must-have: Experience with chip-level verification methodologies, including constrained-random testing, functional coverage, and assertion-based verification (SystemVerilog).
• Must-have: Experience using revision control systems such as Git or Subversion.
• Must-have: Eligible to obtain and maintain an active U.S. Secret security clearance.
• Nice-to-have: ASIC/FPGA lab validation and debug experience; familiarity with DFT, manufacturability, and production test concepts.
• Nice-to-have: Proficiency with Unix/Linux and scripting or software development (C, C++, Python, Perl, shell).
• Nice-to-have: Experience with industry-standard simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field is typically required.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.