FPGA Silicon Design Verification Engineer

Job Title

FPGA Silicon Design Verification Engineer

Role Summary

Owner of pre-silicon functional verification for FPGA IP blocks, subsystems, and SoC-level designs. Works closely with RTL designers, architects, firmware, and validation teams to drive verification closure and enable first-pass silicon/FPGA release.

Experience Level

Mid-level — 3+ years of experience in digital design verification for FPGA or ASIC products.

Responsibilities

Primary verification duties and cross-team collaboration to achieve verification signoff.

• Develop and execute verification plans from architecture and design specifications.
• Design, implement, and maintain reusable SystemVerilog/UVM testbenches, environments, sequences, and scoreboards.
• Create directed and constrained-random tests and define verification metrics (functional, code, assertion coverage).
• Develop and maintain SystemVerilog Assertions (SVA) and functional coverage models.
• Debug and root-cause failures using simulation, emulation, waveform analysis, and protocol analyzers.
• Collaborate with RTL, architecture, firmware, and validation teams to resolve functional and performance issues.
• Participate in design and verification reviews and project milestone assessments; drive verification closure before tape-out or FPGA release.
• Support post-silicon bring-up, FPGA prototyping, and validation as needed.
• Improve verification methodology, automation, and regression infrastructure.

Requirements

Concise list of required and preferred skills. Degree information is summarized under Education Requirements below.

• Must-have: Minimum 3 years' experience in digital verification for FPGA or ASIC products.
• Must-have: Hands-on experience with SystemVerilog and UVM; assertion-based verification and constrained-random methodologies.
• Must-have: Strong understanding of digital design fundamentals: clock-domain crossing, reset synchronization, pipelines, state machines, and memory architectures.
• Must-have: Experience with industry simulators (Synopsys VCS, Cadence Xcelium, Siemens QuestaSim) and waveform/debug tools.
• Must-have: Proficiency in scripting (Python, Perl, Tcl, or Shell) and version control (Git).
• Preferred: Verification experience with networking, storage, compute-acceleration, or high-speed interface IP.
• Preferred: Knowledge of protocols such as PCIe, Ethernet, AXI/AHB/APB, DDR, CXL, or serial interfaces; experience with formal tools, emulation, FPGA prototyping, DFT, and CI/CD-based regression systems.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field — or equivalent practical experience.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.