FPGA Post Silicon Validation Engineer - Configuration, Security and HPS

Job Title

FPGA Post Silicon Validation Engineer - Configuration, Security and HPS

Role Summary

Work on post-silicon validation of FPGA configuration, security features, and Hard Processor System (HPS) integration for next-generation FPGA and SoC devices. The role executes device- and IP-level validation, system bring-up, and cross-team collaboration with architecture, design, firmware, and platform teams.

Experience Level

Mid-level — typically requires 5+ years of hands-on silicon validation or equivalent experience focused on FPGA configuration, security, SoC, or embedded processor subsystems.

Responsibilities

Primary responsibilities include designing and executing validation plans, debugging silicon and system issues, and improving validation infrastructure.

• Develop and maintain validation strategies for FPGA configuration, security, and HPS subsystems.
• Validate configuration flows: power-on reset, cold/warm configuration, partial reconfiguration, recovery scenarios.
• Validate security features: secure boot, authentication, encryption, key management, lifecycle states, and threat mitigation.
• Validate HPS functionality and FPGA–HPS integration: boot flows, reset/clock sequencing, memory interfaces.
• Create and run test cases and vectors for robustness, fault injection, and negative scenarios.
• Perform device and system bring-up, failure analysis, and silicon issue triage across revisions.
• Work with evaluation boards and reference platforms to ensure interoperability and real-world coverage.
• Improve validation automation, test infrastructure, and scalability for future products.
• Collaborate with hardware, firmware, and board teams to influence observability and debug capability.

Requirements

Must-have technical skills and experience for immediate contribution; nice-to-have items listed separately.

• 5+ years of hands-on silicon validation experience with focus on FPGA configuration, security, SoC, or embedded processor subsystems.
• Strong understanding of FPGA configuration architectures, bitstream management, configuration memory, and recovery mechanisms.
• Practical knowledge of hardware security concepts: secure boot, authentication, encryption, key storage, and threat considerations.
• Experience validating HPS/embedded processor subsystems: boot loaders, reset/clock sequencing, memory bring-up, hardware–software interaction.
• System-level validation and debug experience: power-on bring-up, failure analysis, and silicon issue triage.
• Experience using Python for automation, scripting, and test infrastructure.
• Nice-to-have: familiarity with Verilog and broad FPGA/SoC architecture experience.

Education Requirements

Bachelor's or Master’s degree in Electrical & Electronics Engineering, Computer Engineering, or a related field (as stated). Not specified whether equivalent practical experience is accepted.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.