FPGA IP Design Engineer - Intern

Job Title

FPGA IP Design Engineer - Intern

Role Summary

The IP Design and Flows (IPDF) team develops configurable FPGA IP cores and associated design flows for high-speed memory, transceiver, and chip-to-chip interfaces. This intern role contributes to architecture definition, RTL implementation, verification, simulation models, device/CAD integration, and technical documentation as part of a multidisciplinary engineering team.

Estimated salary range: $95,000–$100,000 CAD (market-based, actual offer may vary).

Experience Level

Entry-level / Intern. Suitable for students currently pursuing a related degree. Typical experience guidance: at least 3 months of digital-logic hardware design or verification and at least 3 months of programming or scripting experience.

Responsibilities

Key responsibilities include design, implementation, verification, and support of FPGA IP and flows:

• Define architecture and design IP cores based on protocol specifications for memory, chip-to-chip, or transceiver interfaces.
• RTL development (SystemVerilog/Verilog/VHDL) and creation of simulation models.
• Develop design entry flows for user configuration and integrate with CAD tools.
• Implement verification components (VIP, methodologies, frameworks, bus functional models, regression tests).
• Support hardware power-on, bring-up, and debug activities.
• Support new product release, rollout, and customer technical inquiries.
• Produce and maintain technical documentation and design examples.

Requirements

Listed as must-have and nice-to-have qualifications. Degree requirements are captured separately under Education Requirements.

• Must-have: Hands-on experience (≈3+ months) with digital logic hardware design or verification using SystemVerilog, Verilog, and/or VHDL.
• Must-have: Hands-on experience (≈3+ months) programming or scripting in C/C++ and/or Python.
• Must-have: Strong analytical and problem-solving skills; good communication and teamwork.
• Nice-to-have: Familiarity with FPGA development flows and tools such as Quartus.
• Nice-to-have: Experience with hardware-software co-design or embedded systems projects.
• Nice-to-have: Experience with high-speed protocols and memory interfaces (e.g., DDR5, LPDDR5, HBM, PCIe, Ethernet).

Education Requirements

Must be pursuing a Bachelor's degree in Computer Engineering, Engineering Science, Computer Science, Mathematics, Electrical Engineering, or an equivalent program; or equivalent practical experience acceptable.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.