FPGA Engineer: Verilog, SystemVerilog & Embedded C

Job Title

FPGA Engineer (Verilog, SystemVerilog & Embedded C)

Role Summary

Design and implement FPGA logic and associated embedded software for Electronic Safe and Arm Devices used in Department of Defense weapon systems. Work with system engineers to translate requirements into verified digital and embedded designs and support debugging and product qualification.

Experience Level

Mid-level. Candidates should have proven experience in FPGA and embedded development; typical expectation is experience developing production digital systems.

Responsibilities

Primary responsibilities include architecture, development, verification, and debugging of FPGA and embedded systems:

• Architect, design, and implement FPGA logic using Verilog/SystemVerilog.
• Develop embedded firmware in C and work with C# components where required.
• Translate system requirements into digital design and algorithm implementations.
• Create and execute verification and debugging strategies to ensure product quality.
• Collaborate with systems, hardware, and test teams to integrate and validate designs.
• Document design decisions, test results, and support product qualification for defense applications.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: Hands-on FPGA design experience using Verilog and SystemVerilog.
• Must-have: Embedded firmware development in C; familiarity with C# is required by the posting.
• Must-have: Strong digital design, algorithm development, and debugging skills.
• Must-have: Experience with verification methodologies and hardware bring-up.
• Nice-to-have: Experience on defense or safety-critical systems and knowledge of secure development practices.
• Nice-to-have: Familiarity with toolchains for synthesis, simulation, and FPGA board support.

Education Requirements

Not specified.

About the Company

Company: Retym Israel

Technology company hiring VLSI/ASIC digital design engineers for communication systems and SoC/IP development. Work includes RTL design, verification, synthesis, timing closure, and silicon bring-up.