FPGA Engineer — Verilog, SystemVerilog & Embedded C

Job Title

FPGA Engineer — Verilog, SystemVerilog & Embedded C

Role Summary

Design and implement FPGA-based systems for Electronic Safe and Arm Devices used in DOD weapon systems. Responsible for architecture, digital logic design, embedded software, verification, and product-quality activities within an engineering team based in New York.

Work focuses on reliable, testable implementations that meet defense-quality requirements.

Experience Level

Mid-level (Level - Mid-Career). Typical experience: approximately 3–7 years in FPGA/digital design and embedded software development.

Responsibilities

Primary responsibilities include:

• Architect and implement FPGA logic using Verilog and SystemVerilog.
• Develop embedded C firmware and integrate it with FPGA designs.
• Design and implement algorithms and digital logic for safe-and-arm devices.
• Perform hardware bring-up, debugging, and failure analysis.
• Create and execute verification plans, simulations, and testbenches.
• Collaborate with systems engineers, document designs, and produce test reports.
• Maintain version control for hardware and software and support production handoff.

Requirements

Must-have technical skills and experience:

• Proven FPGA design experience using Verilog and/or SystemVerilog.
• Embedded C development experience for microcontrollers or processor cores.
• Strong digital design and algorithm-development background.
• Experience with hardware debugging and verification methodologies.
• Familiarity with C# or other high-level languages used for tooling or utilities.

Nice-to-have:

• Experience with FPGA toolchains (e.g., Vivado, Quartus), simulation tools, and scripting (Python).
• Experience developing defense or other regulated systems and associated documentation.
• Experience with CI/version-control workflows for hardware/software projects.

Education Requirements

Not specified.

About the Company

Company: Retym Israel

Technology company hiring VLSI/ASIC digital design engineers for communication systems and SoC/IP development. Work includes RTL design, verification, synthesis, timing closure, and silicon bring-up.