FPGA Engineer II

Job Title

FPGA Engineer II

Role Summary

Develop and deliver production-quality FPGA designs for airborne RF electronics within the Airborne RF Electronics Design Department. Work covers AMD (Xilinx), Altera, and Microchip device families and applications such as multi-gigabit interfaces, RF/EO DSP, controls, data links, embedded processing, and processor interfaces.

Collaborate with circuit card designers and systems engineers from requirements and architecture through verification, place-and-route, and production release. Provide documentation and configuration management and report status using an agile framework.

Experience Level

Mid-level. The posting indicates a minimum of approximately 2 years of prior relevant experience; typical expectations align with an Engineer II role.

Responsibilities

Key responsibilities for this individual-contributor role include:

• Design and implement FPGA logic (VHDL/Verilog) for AMD, Altera, and Microchip devices.
• Architect FPGA-based systems: select parts, define interfaces, and capture CONOPS.
• Develop self-checking verification (directed and constrained-random) and track functional/code coverage.
• Integrate and debug FPGA/ASIC hardware in a lab environment; support bring-up and troubleshooting.
• Use digital simulation tools (e.g., Questa, RivieraPro) to verify designs.
• Maintain code using Git, participate in design reviews, and manage code releases in a team setting.
• Create and maintain design documentation: requirements, verification plans, and user guides.
• Report status against budget and schedule; present work products to leadership.

Requirements

Must-have technical skills, security requirements, and environment expectations:

• Experience in FPGA/ASIC design (VHDL and/or Verilog) or verification (SystemVerilog); familiarity with writing maintainable, reliable RTL.
• Hands-on experience with AMD (Xilinx), Altera (Intel), and/or Microchip (Microsemi) devices and vendor tools such as Vivado, Quartus Prime Pro, or Libero.
• Lab integration and hardware debug experience for FPGA/ASIC designs.
• Experience with source control (Git), CI/CD pipelines, and team-based code release practices.
• Proficiency with Python or C for test, automation, or embedded tasks.
• Experience with digital simulation tools (Questa, RivieraPro, or similar) and verification methodologies.
• U.S. citizenship required and the ability to obtain and maintain a U.S. government-issued security clearance; an active Top Secret DoD clearance is required/expected from day one.
• Ability to work onsite in Plano, TX and function as an individual contributor while engaging in professional development.

Nice-to-have:

• Experience with constrained-random verification (UVM/SystemVerilog), high-level synthesis (HLS), or timing closure/CDC analysis.
• Embedded systems design experience (ARM, MicroBlaze, Nios) and multi-gigabit transceiver design.
• Experience with vector processors/GPUs, encryption standards (AES, RSA, ECC), or AI/LLM-assisted workflows.
• Demonstrated ability to lead small design efforts or mentor junior engineers.

Education Requirements

Typical expectation: Bachelor's degree in a STEM field (Engineering, Computer Science, Physics, Mathematics) is expected. Advanced degrees in Electrical Engineering or related STEM fields are preferred. The job posting also states a suitable degree may be counted as equivalent work experience; equivalent practical experience will be considered.

About the Company

Company: Raytheon Technologies

Headquarters: Arlington, VA, USA

Raytheon Technologies is an Aerospace and Defense company offering advanced systems and services for commercial, military, and government customers worldwide. Formed in 2020 from the merger of Raytheon Company and United Technologies Corporation, it operates through three major business units: Collins Aerospace Systems, Pratt & Whitney, and Raytheon. The company specializes in delivering cutting-edge solutions across various fields including quantum physics, hypersonics, and cybersecurity.