FPGA Engineer

Job Title

FPGA Engineer

Role Summary

Develop FPGA digital-logic solutions for small-satellite avionics, from architecture through board bring-up, verification, and production. Work on a cross-disciplinary electronics development team supporting Airbus U.S. Space & Defense satellite programs.

Primary focus is FPGA design and verification for control and dataflow applications on custom satellite hardware, with lab-based bring-up and testing support as required.

Experience Level

Mid-level — typically suitable for engineers with multiple years of FPGA experience. The posting specifies a minimum of 3 years FPGA experience with a Bachelor's degree (or 1 year with a Master's); academic or internship experience may be considered in lieu of industry experience.

Responsibilities

Work across the hardware development lifecycle to design, verify, document, and validate FPGA-based systems for small-satellite avionics.

• Architect, develop, and document FPGA RTL and top-level designs (VHDL/Verilog/SystemVerilog) for control and dataflow functions.
• Use Vivado and Libero toolflows: create constraints, run synthesis, place-and-route, perform static timing analysis and achieve timing closure.
• Run simulations and verification using Vivado simulator, ModelSim, cocotb, or equivalent; evaluate third-party IP cores and SoC integrations.
• Support board bring-up and laboratory testing: develop test scripts and embedded software for Linux and bare-metal platforms to validate hardware.
• Review schematics and PCB pin assignments for FPGA interfaces, clocks, resets, memory, and transceivers; assess resource utilization and power.
• Document designs, compilation reports, software interfaces, and test results; participate in design and system-level reviews.
• Occasional on-site work in the electronics development laboratory and travel to company or subcontractor facilities as required.

Requirements

Required technical skills, security and eligibility requirements, and practical experience expected for immediate contribution.

• Minimum FPGA experience: typically 3+ years (see Education Requirements for degree/experience equivalency).
• Proficient in HDL coding (structural and behavioral) in VHDL, Verilog, or SystemVerilog.
• Experience with AMD/Xilinx Vivado and/or Microchip Libero toolchains, including SoC block diagram integration.
• Experience with digital logic verification and simulation tools (Vivado simulator, ModelSim, cocotb, or similar).
• Proficient with Git for source control.
• Experience programming for hardware validation: C, C++, and Python.
• Strong understanding of synchronous logic design best practices and timing closure workflows.
• Strong written and oral technical communication skills; ability to document architectures and test results.
• US Citizenship required and ability to obtain/maintain U.S. government security clearance; active DoD Secret or higher is highly desirable.

Nice-to-have:

• Familiarity with radiation mitigation techniques (SEU) for space hardware.
• Experience with high-speed interfaces, memory interfaces, transceivers, and FPGA SoCs.
• Prior board bring-up and hardware debug experience on custom PCBs and development kits.

Education Requirements

Bachelor's degree in a STEM field (Science, Technology, Engineering, Mathematics) or related area is stated. The posting specifies equivalency rules: a minimum of 3 years FPGA experience with a Bachelor's degree, or 1 year with a Master's degree; academic or internship FPGA experience may be considered in lieu of industry work experience.

About the Company

Company: Airbus US Space & Defense

Provides satellite, laser-communication, rotor and fixed-wing solutions for U.S. defense, security, space, and intelligence customers. A long-standing U.S. government partner, delivering engineering, manufacturing and mission-focused systems and services.