Job Title
FPGA Engineer — Custom Compute Hardware
Role Summary
The FPGA Engineer will design, implement, verify, and test FPGA prototypes and custom processing modules to support advanced AI compute architectures. Work directly with the founding team on research-driven hardware acceleration, digital prototyping, and system-level integration.
This is a hands-on, internship-focused role emphasizing FPGA architecture, RTL/HLS implementation, verification, and testing, with exposure to ASIC-relevant design flows.
Experience Level
Entry-level / Internship. Position is intended for early-career candidates; no specific years of experience stated.
Responsibilities
Key responsibilities include:
- Translate architectural concepts into FPGA prototypes.
- Design and simulate custom processing modules using Verilog, SystemVerilog, VHDL, or HLS.
- Implement and validate components on FPGA platforms using Vivado, Quartus, or equivalent flows.
- Build testbenches, run timing and area analysis, and execute FPGA verification plans and matrices.
- Benchmark and optimize trade-offs in latency, area, throughput, and memory bandwidth.
- Collaborate with system architects, FPGA design engineers, and embedded software engineers for system integration.
Requirements
Must-have:
- Experience with FPGA development using RTL or HLS (Verilog/SystemVerilog, VHDL, or C++).
- Experience with FPGA development tools (Vivado, Quartus, or equivalent) and synthesis/debug workflows.
- Solid electronic systems background and strong understanding of digital logic fundamentals, including pipelining and timing closure.
- Experience with digital system partitioning and memory mapping/hierarchy on FPGAs.
- Strong skills in simulation, debugging, and verification workflows; comfortable in fast-paced R&D environments.
Nice-to-have:
- Experience with OpenCL or HLS-based design targeting FPGAs.
- Hardware/software co-design and system-level integration experience.
- Project experience in digital design, computer architecture, embedded systems, numerical computing, or AI workloads.
- Exposure to ASIC design concepts (synthesis, floorplanning, RTL-to-GDS) or high-speed interfaces; familiarity with analog/mixed-signal concepts.
Education Requirements
B.S. degree or higher in engineering (preferably Electrical Engineering or Computer Science) as stated in the source.
Compensation: $40 - $80 per hour.
About the Company
Company: Macpower Digital Assets Edge

Date Posted: 2026-06-05