FPGA Engineer

Job Title

FPGA Engineer

Role Summary

Develop and verify FPGA-based digital logic for small-satellite avionics, supporting the full hardware lifecycle from prototype bring-up to production. The role sits on a small-satellite avionics development team focused on control and dataflow applications for space systems.

Position offers fully remote opportunities across the United States; occasional on-site work is required in the program electronics laboratory in University Park (State College), PA. College Station, PA is a highly preferred work location.

Experience Level

Mid-level. Typical experience expectation: minimum 3 years FPGA experience with a bachelor's degree (or 1 year with a master's); academic or internship FPGA experience may be considered in lieu of industry experience.

Responsibilities

The role focuses on FPGA design, verification, and hardware bring-up for small-satellite avionics. Primary responsibilities include:

• Architect, implement, and document FPGA solutions for control and dataflow applications.
• Develop VHDL/Verilog/SystemVerilog RTL and top-level block diagrams for FPGA SoCs.
• Create device constraints, run synthesis/place-and-route, generate device images (Vivado, Libero).
• Perform static timing analysis, achieve timing closure, and address compilation warnings.
• Support laboratory bring-up, debugging, and performance characterization on development kits and custom boards.
• Develop test scripts and embedded software for Linux and bare-metal platforms to validate hardware.
• Review FPGA device selection, estimate resource utilization and power, and provide schematic/PCB feedback (pinouts, clocks, resets, interfaces).
• Participate in make-vs-buy IP trade studies, board/unit design reviews, and cross-disciplinary systems efforts.

Requirements

Must-have technical skills, security and work-authority requirements:

• Minimum 3 years FPGA experience with a bachelor’s degree (or 1 year with a master’s); internship/academic FPGA experience may be considered toward experience.
• Strong proficiency coding structural and behavioral HDL (VHDL, Verilog, SystemVerilog).
• Experience with AMD Xilinx Vivado and/or Microchip Libero toolflows, including SoC block diagram integration and third-party IP usage.
• Digital verification experience using simulators such as Vivado simulator, ModelSim ME, or cocotb.
• Experience with static timing analysis, synthesis, place-and-route, and producing synthesis/implementation reports.
• Proficiency with Git and software skills in C, C++, and Python for verification and test automation.
• Hands-on hardware bring-up, debugging, and lab testing experience on development boards and custom hardware.
• U.S. Citizenship required and ability to obtain and maintain a U.S. Government security clearance (active Secret or higher is highly desirable).
• High proficiency in oral and written technical communication.

Education Requirements

Bachelor's degree in STEM or related field is required; a master's degree reduces the minimum FPGA experience requirement. Academic or internship FPGA experience may be accepted in lieu of some industry experience. Equivalent practical experience may also be considered.

About the Company

Company: Airbus US Space & Defense

Provides satellite, laser-communication, rotor and fixed-wing solutions for U.S. defense, security, space, and intelligence customers. A long-standing U.S. government partner, delivering engineering, manufacturing and mission-focused systems and services.