FPGA Engineer

Job Title

FPGA Engineer

Role Summary

Design and verify FPGA-based digital logic for small-satellite avionics, support board bring-up, testing, and documentation. Work with avionics hardware and systems engineering teams to move designs from prototype to production.

Reports to the program Lead Principal Engineer. Fully remote candidates across the United States are eligible; laboratory on-site work in University Park, PA will be required as needed. Highly preferred location: College Station, PA.

Experience Level

Mid-level — typically 3+ years of FPGA design experience (see Education Requirements for degree/experience equivalencies).

Responsibilities

Primary duties include FPGA architecture, RTL development, verification, and hardware integration. Representative tasks:

• Architect, implement, and document FPGA solutions for control and dataflow applications in small-satellite avionics.
• Develop and verify VHDL/Verilog/SystemVerilog RTL and top-level block designs.
• Create constraints, run synthesis and place-and-route, generate device images using Vivado and Libero.
• Perform static timing analysis, achieve timing closure, and resolve compilation warnings.
• Support laboratory bring-up, debugging, and performance characterization on development kits and custom hardware.
• Develop test scripts and embedded software for Linux and bare-metal platforms to validate hardware function.
• Review FPGA device selection, estimate resource utilization and power, and review schematics/PCB pin assignments and high-speed interfaces.
• Participate in design reviews, IP licensing trade studies, and cross-disciplinary systems engineering activities.

Requirements

Must-have technical skills, security eligibility, and other baseline requirements:

• Proficiency in VHDL, Verilog, or SystemVerilog for structural and behavioral designs.
• Experience with AMD Xilinx Vivado and/or Microchip Libero toolflows and SoC block integration.
• Experience with simulation/verification tools such as Vivado simulator, ModelSim, or cocotb.
• Practical knowledge of timing analysis and timing closure techniques.
• Experience using Git for version control and writing test/validation code in C, C++, or Python.
• Hands-on FPGA board bring-up, debugging, and hardware verification experience.
• Strong written and verbal technical communication skills.
• US Citizenship required; ability to obtain and maintain U.S. government security clearance. Active DoD Secret or higher is highly desirable.
• Occasional travel to Airbus U.S. facilities and subcontractor sites as required.
• Nice-to-have: familiarity with radiation mitigation techniques for single-event upsets.

Education Requirements

Bachelor's degree in a STEM field or related area is expected, or equivalent practical experience. The posting specifies a minimum of 3 years FPGA experience with a bachelor's degree, or 1 year with a master's degree; academic or internship FPGA experience may be considered in lieu of industry experience.

About the Company

Company: Airbus US Space & Defense

Provides satellite, laser-communication, rotor and fixed-wing solutions for U.S. defense, security, space, and intelligence customers. A long-standing U.S. government partner, delivering engineering, manufacturing and mission-focused systems and services.