FPGA Engineer

Job Title

FPGA Engineer

Role Summary

Develop and verify FPGA digital-logic solutions for small-satellite avionics across the hardware development lifecycle: architecture, RTL development, synthesis/place-and-route, lab bring-up, testing, and production support. The role reports to the program Lead Principal Engineer and works with cross-disciplinary hardware and systems teams.

Experience Level

Mid-level: typically requires ~3 years of FPGA experience (industry, academic, or internship experience considered).

Responsibilities

Primary responsibilities cover FPGA design, verification, and hardware bring-up, with supporting architecture and review tasks.

• Architect, develop, and document FPGA solutions for control and dataflow applications in small-satellite avionics.
• Implement and verify RTL (VHDL/Verilog/SystemVerilog) and top-level block diagrams for FPGA SoCs.
• Create device constraints, perform logic synthesis, place-and-route, generate device images using Vivado and Libero, and disposition compilation warnings.
• Perform static timing analysis and achieve timing closure; generate and review compilation reports.
• Support laboratory bring-up, debugging, and performance characterization of FPGA designs on development kits and custom hardware.
• Develop test scripts and embedded software for Linux and bare-metal platforms to validate hardware during bring-up and testing.
• Review FPGA device selection, estimate resource utilization and power, and review schematics/PCB pin assignments for FPGA interfaces.
• Support make-vs-buy trade studies for third-party IP, board/unit-level design reviews, and systems-level integration tasks.

Requirements

Must-have technical skills, tools experience, and eligibility.

• Proficiency coding structural and behavioral RTL in VHDL, Verilog, or SystemVerilog.
• Hands-on experience with FPGA toolflows (AMD Xilinx Vivado and/or Microchip Libero).
• Experience in digital verification using simulators such as Vivado simulator, ModelSim, or cocotb.
• Proficiency with source control (Git) and scripting/programming for verification (Python, C, C++).
• Practical experience achieving timing closure and applying synchronous-logic best practices.
• Ability to perform lab-based board bring-up, debugging, and testing; travel to facilities as needed.
• U.S. citizenship and ability to obtain and maintain a U.S. government security clearance.

Nice-to-have:

• Familiarity with FPGA SoC block integration and third-party IP integration.
• Experience with radiation mitigation techniques for single-event upsets and high-reliability space designs.
• Prior active DoD clearance (Secret or above) is desirable.

Education Requirements

Bachelor's degree in a STEM field (or related area) is stated; master's degree is acceptable. The posting specifies experience equivalency: typically 3 years of FPGA experience with a bachelor's degree or 1 year with a master's degree; academic or internship FPGA experience may be considered in lieu of industry experience. (Equivalent practical experience acceptable.)

About the Company

Company: Airbus US Space & Defense

Provides satellite, laser-communication, rotor and fixed-wing solutions for U.S. defense, security, space, and intelligence customers. A long-standing U.S. government partner, delivering engineering, manufacturing and mission-focused systems and services.