FPGA Emulation Engineer (up to Staff)

Job Title

FPGA Emulation Engineer (up to Staff)

Role Summary

Join the SoC Design team to develop and integrate large-scale SoC emulation platforms (e.g., Synopsys HAPS or comparable systems). Deliver reliable FPGA-based emulation for complex SoC subsystems, enabling verification, timing closure, and system-level validation across multiple FPGA machines.

Experience Level

Senior-level. Candidates should have demonstrated hands-on SoC FPGA integration and emulation experience (typically multiple years working on multi-FPGA or large-scale emulation systems).

Responsibilities

Deliver and maintain FPGA-based emulation platforms and ensure they meet project and verification needs.

• Design, build, and integrate large-scale SoC emulation platforms using multiple FPGA/emulation systems.
• Implement and optimize communication and data flow between CPU, memory, interconnect, and peripherals in FPGA-mode.
• Develop and integrate FPGA-mode interfaces (AXI, AHB, APB, etc.) and multi-machine connectivity.
• Define and manage FPGA-mode clock and reset architectures across multiple systems.
• Collaborate with high-speed IO designers to integrate DDR, MIPI, USB, PCIe models and daughter boards for emulation coverage.
• Apply FPGA synthesis and implementation practices to maximize utilization and achieve timing closure.
• Debug integration issues spanning simulation, emulation, and software-validation environments.
• Support system bring-up, performance analysis, correlation, and cross-functional project milestones.

Requirements

Must-have technical skills and experience; preferred items listed below.

• Must-have: Hands-on experience in SoC FPGA integration and emulation methodologies.
• Must-have: Strong understanding of chip-level communication protocols and subsystem interaction (AXI/AHB/APB and similar).
• Must-have: Strong scripting skills (Python, Tcl, Shell) and familiarity with AI prompt techniques for automation or tooling.
• Must-have: Practical knowledge of FPGA implementation: synthesis, placement, routing, timing analysis, and timing closure.
• Must-have: Experience debugging across simulation, emulation, and software-validation environments; strong problem-solving and communication.
• Nice-to-have: Extensive experience with Synopsys HAPS or comparable multi-FPGA emulation platforms.
• Nice-to-have: Hands-on experience with high-speed I/O technologies (DDR, MIPI, USB, PCIe) and daughter-board integration.
• Nice-to-have: Experience with large multi-machine FPGA partitions, system-level debugging, and globally distributed teams.

Education Requirements

Qualifications in Science or Engineering are specified. Acceptable combinations listed in the posting include: Bachelor's degree in Science/Engineering or related field with ~4+ years of ASIC/verification/integration experience; Master's degree in Electrical Engineering, Computer Engineering, or related field with ~3+ years of relevant experience; PhD in Science/Engineering or related field with ~2+ years of relevant experience. Fields referenced include electrical and computer engineering and related technical disciplines.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.