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FPGA Design Engineer (HDL Design/Coding)

Bit Mapper Integration
October 13, 2026
Full-time
On-site
Pune, Maharashtra, India
FPGA Programming Jobs, Level - Mid-Career

Job Title

FPGA Design Engineer (HDL Design/Coding)

Role Summary

Develop and verify HDL for FPGA-based systems, focusing on Verilog/VHDL implementation and FPGA tool flows. Work with the internal design team and customer engineering teams to implement interfaces, memory subsystems, and deliver functional designs.

Projects typically involve Xilinx/Altera toolchains, synthesis and timing closure, and integration of high-speed interfaces.

Experience Level

Mid-level (1–4 years of relevant experience)

Responsibilities

Primary responsibilities include RTL development, tool-flow execution, and cross-team integration.

  • Write, review, and maintain Verilog or VHDL RTL code.
  • Run synthesis, implementation, and timing closure using Xilinx/Altera (Intel) tool flows.
  • Design and integrate high-speed interfaces and memory controllers (PCIe, USB, Ethernet, SerDes, DDR).
  • Collaborate with customer engineering teams to capture requirements and coordinate design handoffs.
  • Debug designs via simulation and on-board testing; produce clear design documentation.
  • Apply solid digital-logic and engineering fundamentals to meet performance and reliability targets.

Requirements

Core qualifications and skills required or preferred for the role.

  • Must-have: Proficiency in Verilog or VHDL and RTL design.
  • Must-have: Practical experience with Xilinx or Altera (Intel) FPGA tool flows (synthesis, place-and-route, timing analysis).
  • Must-have: Understanding of FPGA architecture and strong digital-logic fundamentals.
  • Must-have: Effective communication and ability to interface with cross-functional and customer engineering teams.
  • Must-have: 1–4 years of hands-on FPGA/embedded design experience.

Nice-to-have:

  • Experience with high-speed interfaces: PCIe, USB, Ethernet, SerDes.
  • Experience with memories and controllers (DDR).
  • Analog or mixed-signal fundamentals.

Education Requirements

Not specified.


About the Company

Company: Bit Mapper Integration

Headquarters: Pune, Maharashtra, India

Engineering services company specializing in FPGA, embedded systems and digital design solutions, offering design, integration and verification support for interfaces like PCIe, USB, Ethernet and memory subsystems.

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Date Posted: 2026-10-09