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FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX
October 2, 2026
Full-time
On-site
Irvine, California, United States
$125,000 - $195,000 USD yearly
RTL Design Jobs, Level - Entry or Early Career

Job Title

FPGA/ASIC Design Engineer (Silicon Engineering)

Role Summary

Work on the design, integration, validation, and optimization of FPGA and ASIC designs for Starlink space and ground systems. Collaborate with systems, firmware, architecture, implementation, and validation teams to deliver reliable silicon for production and on-orbit use.

Experience Level

Entry-level / early-career. The posting requests approximately 1+ years of RTL design experience.

Responsibilities

Deliver RTL, participate in full chip/FPGA lifecycle, and support lab and on-orbit validation.

  • Design ASIC and FPGA SoC blocks and system integration using Verilog/SystemVerilog/VHDL.
  • Optimize designs for power, performance, and area.
  • Participate in architecture, microarchitecture, partitioning, and backend implementation handoffs.
  • Support lab bring-up, board-level debugging, and validation for production and on-orbit verification.
  • Design test systems and validation infrastructure for generational interoperability and DSP/communications subsystems.
  • Collaborate with software and firmware teams to integrate production software for silicon features.
  • Develop tools and analyze data from lab and on-orbit systems to improve designs.

Requirements

Key qualifications and preferences. Must-haves are listed first.

  • Must-have: 1+ years of RTL design experience using SystemVerilog, Verilog, or VHDL.
  • Must-have: Practical experience with ASIC/FPGA design flow, integration, and lab bring-up.
  • Must-have: Ability to work extended hours or weekends as required for mission-critical deadlines.
  • Must-have: ITAR eligibility: must be a U.S. citizen, lawful permanent resident, refugee, asylee, or otherwise eligible for required U.S. Department of State authorizations.
  • Nice-to-have: Experience with DSP, digital communications/datapath or modem design.
  • Nice-to-have: Proficiency in Python, C/C++, and Bash.
  • Nice-to-have: Familiarity with EDA and FPGA toolchains (HDL simulators, lint tools, Vivado/Quartus, etc.) and with AXI/AHB/APB protocols.
  • Nice-to-have: Experience debugging complex PCBs containing microprocessors and FPGAs using oscilloscopes, spectrum analyzers, and lab instrumentation.
  • Nice-to-have: Demonstrated ability to work cross-functionally and adapt in a dynamic environment.

Education Requirements

Required: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or Physics. Preferred: Master’s degree in Electrical/Computer Engineering or a related technical field.


About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.

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Date Posted: 2026-10-01