Firmware Engineer II
Member of the DDR PHY IP Front End Design team developing firmware for DDR5 PHY microcontrollers. The role focuses on bare-metal embedded firmware, low-level APIs, firmware-hardware co-verification, and collaborating with hardware designers and memory subsystem architects to implement training algorithms.
Work includes RTL simulation debugging, silicon bring-up support, and interaction with verification and hardware teams to ensure correct PHY operation.
Mid-level (Firmware Engineer II). Typical experience range: approximately 3β7 years in embedded firmware or related roles.
Primary responsibilities include firmware development, verification collaboration, and debugging across simulation and hardware:
Must-have technical skills and experience:
Not specified.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
