Failure Analysis Engineer

Job Title

Failure Analysis Engineer

Role Summary

Perform chip- and package-level failure analysis to determine physical root causes for semiconductor ICs. Work within a Failure Analysis team and collaborate with Product, Design, Quality and Foundry engineering to investigate failures, summarize findings, and drive corrective actions.

Experience Level

Mid-level. Preferred experience: 2+ years chip-level failure analysis or related industry experience (listed as preferred by employer).

Responsibilities

Core responsibilities include leading fault investigations, using electrical and physical analysis tools, and documenting root-cause conclusions for high-risk or single-device analyses.

• Perform failure analyses across multiple devices and cases; act as case owner for parallel investigations.
• Apply advanced failure-analysis techniques (physical FA, electrical microscopy, nanoprobing) to isolate and diagnose failures.
• Administer non-destructive inspections and imaging (X-ray, C-SAM, optical inspections).
• Perform electrical fault isolation using static laser techniques (XIVA, OBIRCH), photoemission microscopy, lock-in thermal microscopy, and related methods.
• Use dynamic stimulation, thermal and photonic fault injection, and interface with system-level ATE and bench test platforms for functional debug.
• Carry out physical failure analysis on modules, packages, and individual ICs to identify defect evidence.
• Document and report analysis results, identify root causes, and communicate conclusions to requesters and cross-functional teams.

Requirements

Must-have technical skills, laboratory abilities, and workplace traits required to perform the role.

• Strong knowledge of semiconductor physics, device behavior, circuit analysis, and wafer fabrication processes.
• Proficiency with physical and electrical analysis techniques: mechanical polishing, chemical delayering, SEM inspection, curve tracing, thermal emission, photon emission, OBIRCH/TIVA.
• Experience with optical fault isolation and tester interfaces: Soft Defect Localization, Laser Voltage Probing, frequency mapping, time-resolved emission, and thermal mapping.
• Experience in SEM-based nano-probing methods such as EBIC, EBAC, EBIRCH on planar, SOI and FinFET technologies.
• Familiarity with digital/Mixed-signal test concepts: SCAN logic, Memory BIST, and RF/Analog design strategies.
• Familiarity with reliability and qualification testing (CDM, HBM, TLP, HTOL, BHAST, BURN-IN) for devices and packaging.
• Practical lab skills, ability to work in a laboratory environment, and effective collaboration with multi-functional international teams.
• Strong communication, organization, and project-management skills; able to manage multiple cases concurrently.
• Willingness to work flexible hours, including weekend or night shifts when required.
• Experience with scripting/programming for automation and data analysis (Python, scripting languages, Power BI).
• Nice-to-have: prior FA experience in the semiconductor industry, Automated Test Equipment (ATE) experience, and product reliability or product development exposure.

Education Requirements

Minimum: Bachelor's degree in Science, Engineering, or a related field. Preferred: Master's degree in Electrical Engineering, Microelectronics, Physics, or related disciplines. (Employer lists a Master's as preferred; equivalent practical experience not explicitly stated.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.