M

Expert Hardware / RTL Engineer — SystemVerilog / Verilog

Mercor Alabaster
June 05, 2026
Full-time
On-site
All Cities, CT, United States
$110 - $190 USD hourly
RTL Design Jobs, Level - Senior

Job Title

Expert Hardware / RTL Engineer — SystemVerilog / Verilog

Role Summary

Join an AI research team evaluating advanced models on real-world hardware-engineering tasks. You will use deep, hands-on RTL expertise to assess code-level scenarios and produce clear, structured written evaluations that guide how AI systems learn to operate in hardware design.

Experience Level

Senior — typically 5+ years of professional or research RTL experience in SystemVerilog or Verilog.

Responsibilities

Perform time-bounded, well-scoped evaluation tasks that judge RTL artifacts and engineering environments against professional standards.

  • Review RTL (SystemVerilog/Verilog) code and testbenches and judge correctness, style, and idiomatic usage.
  • Run and interpret containerized (Docker) repositories and CI-style automated checks to assess the engineering environment.
  • Produce concise, structured written assessments explaining technical judgments and rationale.
  • Complete defined tasks within explicit time limits and evaluation criteria.
  • Provide expert feedback on verification approaches (UVM/testbench), FPGA or ASIC integration, and EDA toolchain usage.

Requirements

Key qualifications and preferred background. Must-have items are listed first.

  • Must-have: 5+ years professional or research RTL experience in SystemVerilog or Verilog.
  • Must-have: Hands-on RTL design and verification experience, including testbench/UVM and FPGA or ASIC work.
  • Must-have: Practical experience with EDA toolchains (examples: Vivado, Quartus, Synopsys, Cadence) or equivalent tooling experience.
  • Must-have: Comfortable working in Linux/Docker-based repo environments and interpreting automated/CI checks, or able to ramp quickly.
  • Must-have: Ability to write clear, technical rationales describing why code is correct or idiomatic.
  • Nice-to-have: Backgrounds in semiconductor, telecom, defense/aerospace, national labs, or academia; prior FPGA/ASIC project experience at scale.

Education Requirements

Not specified.


About the Company

Company: Mercor Alabaster

A leading AI research organization that evaluates advanced AI systems in specialized engineering domains. Engages expert hardware engineers to assess RTL/SystemVerilog/Verilog designs, review code-level scenarios, run CI-style checks, and produce structured written evaluations to guide AI performance in hardware design.

Mercor Alabaster logo

Date Posted: 2026-06-05