Experienced Hardware Design Engineer
The Hardware team develops high-performance FPGA and ASIC compute engines for low-latency trading systems. This role architects and implements RTL designs, optimizes hardware for latency and throughput, and collaborates with software and research teams to deliver production hardware solutions.
Entry-level (professional experience: 2+ years in RTL design for FPGA or ASIC).
Design, implement, verify, and optimize hardware modules and systems for FPGA/ASIC platforms; collaborate across teams to deliver production-ready solutions.
Key technical requirements and desirable skills. Education is listed separately below.
Bachelor’s degree in computer science, electrical engineering, or a related field is listed as required.
Company: Hudson River Trading
Headquarters: New York, New York, USA
Hudson River Trading (HRT) is a leading financial technology firm that employs advanced computing solutions for algorithmic trading. Specializing in FPGA and ASIC technology, HRT focuses on creating high-performance trading systems designed to operate in real-time global markets. With a diverse team of innovators from various fields, HRT fosters a collaborative and transparent culture to drive success and promote cutting-edge developments.
