Engineering Lead

Job Title

Engineering Lead

Role Summary

Lead system-level validation and pre-silicon verification for high-speed interconnect solutions (PCIe, CXL, NVMe, UCIe) across simulation, emulation, and FPGA prototyping platforms. The role combines hands-on technical work with technical leadership to define verification strategies, drive execution, and ensure product readiness.

Experience Level

Senior — typically requires 8+ years of industry experience in system-level testing and verification.

Responsibilities

Primary responsibilities focus on defining verification strategies, delivering system validation, and leading cross-functional verification efforts.

• Lead testing and verification for high-speed interconnect protocols and solutions (PCIe, CXL, NVMe, UCIe).
• Architect and execute end-to-end pre-silicon verification across simulation, hardware-assisted emulation, and FPGA prototyping.
• Build and integrate verification environments: SystemC/UVM transactors, RTL monitors, BFMs, and full software stacks for HW/SW co-verification.
• Validate system-level performance, interoperability, latency, bandwidth, coherency, and scalability; identify system bottlenecks.
• Define and maintain regression strategy: test selection, coverage tracking, and failure triage for release qualification.
• Design and maintain CI/CD pipelines and validation infrastructure for continuous testing at scale.
• Perform deep-dive debugging and root-cause analysis of protocol failures, RTL issues, and system bring-up in emulation environments.
• Collaborate with R&D, Product Management, Product Engineering, and Application Engineering to ensure feature readiness and resolve system issues.
• Mentor and guide engineers; conduct design and test plan reviews and ensure verification sign-off.

Requirements

Must-have technical skills and experience for the role; nice-to-have items follow.

• 8+ years industry experience in system-level testing and verification.
• Strong hands-on experience with interconnect protocols: PCIe, CXL, NVMe, AXI, UCIe.
• Experience with hardware-assisted verification platforms (e.g., Veloce, Palladium, ZeBu) or FPGA prototyping.
• Expertise in verification methodologies and languages: SystemVerilog, SystemC, UVM, and HW/SW co-verification techniques.
• Proficiency in C/C++ and experience with bare-metal testing and validation against Linux drivers, firmware, or hypervisors.
• Strong debugging skills across RTL, protocol, and system-level issues, including transaction-level analysis.
• Experience building validation infrastructure, CI/CD pipelines, regression management, and automation using Python, Bash, or similar scripting languages.
• Solid understanding of CPU architectures, memory hierarchies, IOMMU, cache coherency, and virtualization.
• Proven ability to define verification strategies and lead cross-functional technical initiatives.

• Experience scaling verification teams and mentoring engineers in a global R&D organization.
• Background with full-software stacks and system performance analysis at scale.

Education Requirements

Bachelor's or Master's degree in Electronics and Communications Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Siemens

Headquarters: Munich, Germany

Siemens EDA is a leading global provider of Electronic Design Automation (EDA) products and systems. Their innovative solutions enable companies to enhance the development of electronic products efficiently and effectively, keeping pace with the complex demands of technology and physics. Siemens is committed to delivering advanced workflow solutions that integrate both EDA and MCAD tools for multi-domain design and manufacturing in the semiconductor industry.