Engineering IP Program Manager, Principal

Job Title

Engineering IP Program Manager, Principal

Role Summary

Lead program management for SoC IP development and delivery across Marvell product and custom silicon businesses. The role coordinates cross-functional engineering teams (analog, digital, DFT, layout, timing, validation, PnR) to deliver IP from concept through mass production release.

Experience Level

Senior level. Typical experience guidance in the posting: 10–15 years with a Bachelor's or 5–10 years with a Master’s/PhD. Additional expectations include 6+ years as an engineering project manager in the semiconductor industry and 6+ years of mixed-signal IP design experience.

Responsibilities

Primary program management duties and cross-functional leadership.

• Manage end-to-end IP program delivery and coordinate dependencies with product business units.
• Define and communicate deliverables and dependencies across local skill groups and the Central Engineering PM team.
• Drive closure of IP specifications and requirements.
• Chair regular cross-functional status meetings; report milestones and program status to executive stakeholders.
• Provide matrixed leadership for engineering managers distributed across the organization.
• Implement risk management, lessons learned, and enforce agreed processes.
• Support and follow Marvell program management processes to achieve successful IP outcomes.

Requirements

Must-have technical and professional experience; preferred items listed separately.

• 10+ years of related professional experience (role expects senior-level responsibility).
• 6+ years experience as an engineering project/program manager in the semiconductor industry (preferred).
• 6+ years of mixed-signal IP design experience.
• Proven experience with SoC/IC design flows, advanced process technologies, and silicon development methodologies.
• Demonstrated ability to partner with technical managers and drive projects to completion across functions.
• Strong cross-functional leadership, stakeholder management, and experience presenting to executive audiences.
• Excellent verbal and written communication skills.
• Broad background in ASIC or microelectronics semiconductor product development.
• Preferred experience as a mixed-signal design manager and familiarity with program-level equity/bonus participation (compensation plan participation noted in posting).

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or a related field is listed (BS in Electrical Engineering; MSEE preferred). The posting specifies: Bachelor’s + 10–15 years related experience, or Master’s/PhD + 5–10 years related experience. Fields noted: Computer Science, Electrical Engineering, related technical fields. (No alternative certification or "equivalent experience" phrase beyond the degree+experience combinations above.)

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.