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Engineering Design Intern

Microchip
August 27, 2026
Part-time
On-site
Chandler, Arizona, United States
RTL Design Jobs, Level - Entry or Early Career

Job Title

Engineering Design Intern

Role Summary

Join Microchip's Data Center Solutions (DCS) IP Design team to support development of next-generation storage controller SoC products. The intern will work with engineers on RTL development, simulation/synthesis analysis, and automation to improve design productivity.

This is a part-time internship (up to 25 hours/week) focused on hardware IP design and applying AI tools and flows to accelerate the design process.

Experience Level

Entry-level / Internship. Targeted at senior undergraduate students or postgraduate students pursuing degrees in related engineering disciplines; part-time while completing degree program.

Responsibilities

Primary responsibilities include hands-on RTL and tool development plus collaboration with design teams.

  • Write and maintain RTL for digital logic blocks using Verilog/SystemVerilog.
  • Analyze simulation, synthesis, and timing results; identify issues and work with design/verification engineers to resolve them.
  • Contribute to automated design flows and scripts (synthesis, lint, CDC, timing).
  • Help design, implement, and integrate AI-based tools and workflows to improve design efficiency.
  • Research and evaluate new AI technologies applicable to ASIC/IP design.
  • Participate in team meetings and technical reviews.

Requirements

Must-have technical skills and practical abilities for the internship. Education expectations are listed separately in the Education Requirements section.

  • Familiarity with Verilog and SystemVerilog and interest in RTL design.
  • Programming/scripting skills (Tcl, Python, Perl) for flow automation.
  • Ability to interpret simulation, synthesis, and timing reports and debug issues.
  • Strong analytical, written and verbal communication, and documentation skills.
  • Problem-solving and debugging experience on digital design projects.
  • Ability to work up to 25 hours per week while enrolled in a degree program.
  • Nice-to-have: exposure to AI applied to design or process improvement; familiarity with ASIC/IP tool flows.

Education Requirements

Currently enrolled in an Electrical Engineering and/or Computer Engineering degree program (senior-level undergraduate preferred) or actively pursuing post-graduate studies in a related discipline. Coursework in digital design and computer architecture is expected; experience with digital design projects using Verilog/SystemVerilog is preferred. Preferred graduation: Summer 2027.


About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

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Date Posted: 2026-08-26