SiFive logo

Engineer / Staff / Sr. Staff Engineer - CPU Verification (RAS)

SiFive
July 29, 2026
Full-time
On-site
Hyderabad, Telangana, India
Verification Jobs, Level - Senior

Job Title

Engineer / Staff / Sr. Staff Engineer - CPU Verification (RAS)

Role Summary

Join the CPU verification team to develop and maintain block- and subsystem-level verification environments for SiFive's CPU IP with emphasis on Reliability, Availability, and Serviceability (RAS). The role spans multiple seniority levels; specific responsibilities and ownership depend on experience.

Experience Level

Multiple levels (Engineer through Sr. Staff). Typical candidates have 1+ years of verification experience; exact leveling will be matched to demonstrated skills and technical ownership.

Responsibilities

Primary responsibilities include building verification environments, deriving requirements from architecture, writing tests, debugging RTL/simulation issues, and maintaining regression infrastructure.

  • Develop and maintain block- and subsystem-level testbenches using SystemVerilog and UVM.
  • Extract verification requirements from architecture specifications and contribute to test plan reviews.
  • Write directed and constrained-random tests to achieve functional and code coverage targets.
  • Debug simulation failures and collaborate with RTL designers to resolve complex issues.
  • Maintain and optimize automated regression setups and CI workflows.

Requirements

Must-have skills; hiring level determines depth of ownership.

  • Strong understanding of advanced computer architecture (pipelines, memory hierarchies, caches).
  • Proficiency in SystemVerilog and UVM for functional verification.
  • Solid knowledge of verification methodologies including constrained-random stimulus and coverage-driven verification.
  • Experience debugging simulations and working closely with RTL designers.
  • Scripting skills for automation (Python, Perl, or Bash).
  • Experience with automated regression frameworks and CI.

Preferred:

  • Experience with RAS verification techniques: ECC testing, parity checks, data poisoning, hardware fault injection.
  • Familiarity with the RISC-V ISA and custom extensions.
  • Experience operating under export-control and work-authorization constraints.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field as stated in the posting. The role references 1+ years of verification experience in conjunction with these degrees.


About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.

SiFive logo

Date Posted: 2026-07-28