Engineer, SoC RTL Engineer

Job Title

Engineer, SoC RTL Engineer

Role Summary

Digital Design Engineer working on high-performance chiplet-based SoC architectures. The role focuses on RTL implementation, microarchitecture collaboration, and power/performance/area (PPA) aware design, with mentorship from senior engineers.

Based in Tokyo with a hybrid work model and flexible hours; the team works across design, verification, physical design, and firmware to deliver AI hardware.

Experience Level

Entry-level / Junior (suitable for recent graduates and engineers with ~0–3 years experience). Candidates at various levels may be assessed during interview.

Responsibilities

Key responsibilities include:

• Write and maintain RTL using SystemVerilog/Verilog to implement and modify custom IP blocks and SoC components.
• Assist RTL implementation and integration of compute, interconnect, and memory-heavy blocks.
• Support verification and validation using emulation, FPGA prototyping, and basic UVM flows.
• Work with senior engineers to translate specifications into RTL and support backend synthesis and timing closure.
• Contribute to PPA-driven tradeoffs and basic performance/power analysis.
• Participate in code reviews, design documentation, and team collaboration across disciplines.

Requirements

Key qualifications and skills required or strongly preferred:

• Practical RTL experience with SystemVerilog or Verilog (academic projects, internships, or prior work).
• Solid foundational understanding of computer architecture and digital logic design.
• Awareness of Power, Performance, and Area (PPA) tradeoffs and basic timing concepts.
• Familiarity with verification flows, FPGA prototyping, or basic UVM-based testing.
• Strong analytical problem-solving skills and ability to work collaboratively in cross-functional teams.
• Ability to communicate design intent and participate in code reviews.
• Employment may be contingent on eligibility to access U.S. export-controlled technology; candidates must be able to comply with applicable export regulations.

Nice-to-have:

• Basic understanding of RISC-V architecture, on-chip fabric/interconnect design, DFT, or hardware debugging.
• Experience with FPGA prototyping, ASIC flows, or advanced UVM methodologies.

Education Requirements

Recent graduates are encouraged; academic or internship experience in RTL development is acceptable. No specific degree or field-of-study (e.g., Bachelor's or Master's) is explicitly required; equivalent practical experience is acceptable.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.