Engineer, Package 6Silicon Integration

Job Title

Engineer, Package 6Silicon Integration

Role Summary

Entry-level engineer in Package Development Engineering supporting NAND package and silicon integration for next-generation memory products. Work cross-functionally with silicon design, wafer fabrication, package design, and assembly teams to support integration activities in a high-volume manufacturing environment.

Experience Level

Entry-level — less than 2 years of relevant experience, including internships, co-op programs, or research.

Responsibilities

Support package–silicon integration activities under mentorship and contribute to analysis, documentation, and cross-functional investigations.

• Collect data and perform basic chip-package interaction (CPI) assessments; document results.
• Assist package, scribe, and assembly engineers on wafer dicing, singulation, and integration topics.
• Support DFMEA/PFMEA activities by preparing inputs, reviewing risk items, and tracking action items.
• Work with wafer fab, R&D, and manufacturing teams on yield, quality, and manufacturability investigations.
• Execute test vehicles and DOEs: perform data collection, basic analysis, and report preparation.
• Learn package and silicon development flows, design rules, and change-management processes.
• Prepare technical documentation and presentation materials for design reviews and project updates.
• Escalate technical issues and seek guidance when encountering unfamiliar problems.

Requirements

Key technical and professional skills required or helpful for the role.

Must-have

• Fundamental understanding of semiconductor manufacturing and/or packaging concepts (coursework or internship level).
• Exposure to structured problem-solving methods (FMEA, DOE, basic data analysis).
• Ability to follow defined engineering procedures and analyze straightforward technical problems.
• Basic proficiency in Microsoft Excel, Word, and PowerPoint for data analysis and documentation.
• Strong attention to detail and good written and verbal communication skills.

Nice-to-have

• Experience or coursework related to DFMEA/PFMEA, wafer dicing/singulation, or test vehicle execution.
• Previous internships, co-op placements, or research in semiconductor, materials, or manufacturing fields.

Education Requirements

Bachelor's or Master's degree in Engineering (Mechanical, Materials Science, Electrical, Chemical, or related discipline). Candidates with equivalent practical experience including internships, co-op programs, or research experience (as part of the stated <2 years of relevant experience) are acceptable.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.