Engineer NCG - HBM Layout

Job Title

Engineer NCG - HBM Layout

Role Summary

Layout design engineer on Micron's HBM (High Bandwidth Memory) team in Guadalajara, Mexico. The role focuses on creating and verifying physical IC layouts for high-performance memory used in AI and HPC applications.

Work involves collaborating with global engineering teams across multiple concurrent projects to deliver manufacturable, optimized layouts.

Experience Level

Entry-level / New graduate. Role is intended for recent graduates (graduation within the past two years).

Responsibilities

Primary responsibilities include developing and verifying physical layouts with attention to performance, power, and manufacturability.

• Create IC layouts for leaf cells, standard cells, and sub-blocks optimized for performance, power, area, and capacitance.
• Interpret and act on DRC, LVS, and other physical verification results to produce correct custom layouts.
• Apply systematic, detail-focused problem-solving during layout and verification tasks.
• Plan and execute layout tasks efficiently across multiple projects and schedules.
• Collaborate with internal engineering teams across global sites to integrate layout deliverables.
• Continue technical learning and contribute to HBM design improvements and automation efforts.

Requirements

Must-have technical skills, communication ability, and motivation. Education details are listed under Education Requirements below.

• Strong understanding of electronic circuit concepts and familiarity with circuit simulation or design tools.
• Detail-oriented approach to physical verification and layout-related problem solving.
• Effective interpersonal and communication skills; conversational English.
• Ability to collaborate with distributed teams and work on multiple projects.
• Motivation to learn semiconductor technology and develop layout expertise.

Nice-to-have:

• Internship or academic project experience in pre-silicon circuit design, analog circuits, physical design, or analog layout.
• Knowledge of MOS fundamentals, semiconductor fabrication, and layout impacts on speed, capacitance, power, and area.
• Experience with Cadence VLE/VXL, Siemens/Mentor Graphics Calibre (DRC/LVS), or similar layout and verification tools.
• Proficiency in programming/scripting (C++, Python) and familiarity with AI-enabled automation methods.

Education Requirements

Bachelor's, Master's, or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology, or a related technical field. Candidates should have graduated within the past two years.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.