Engineer II, Physical Design - Cores
SiFiveJob Title
Engineer II, Physical Design - Cores
Role Summary
As a Physical Design Engineer on the cores team, you will implement CPU blocks through the full ASIC physical-design flow (RTL to GDSII) on advanced process nodes. You will work with RTL, microarchitecture, verification, and methodology teams to meet aggressive power, performance, and area targets while developing automation and backend expertise under mentorship.
Experience Level
Mid-level — typically 3+ years of relevant experience. Strong new graduates with excellent academic credentials may be considered.
Responsibilities
Primary responsibilities include:
- Execute the physical design flow for CPU blocks: synthesis, place & route, and timing closure.
- Bridge architecture and implementation: translate microarchitectural intent into physical implementation and participate in cross-layer co-design discussions.
- Analyze timing reports, routing congestion, and power metrics to help meet PPA goals.
- Develop and maintain scripts and automation (Python, Tcl, Bash, etc.) to improve flow efficiency and parse reports.
- Collaborate cross-functionally with RTL, microarchitecture, verification, and methodology teams.
- Absorb mentorship from senior engineers and contribute to process and methodology improvements.
Requirements
Must-haves:
- Approximately 3+ years of relevant digital/ASIC experience or equivalent practical experience.
- Strong foundation in computer architecture (pipelines, hazards, memory hierarchy, caches).
- Ability to read and understand RTL (Verilog or SystemVerilog) and digital logic design.
- VLSI exposure via projects, internships, or professional work in ASIC flows.
- Proficiency in at least one scripting or programming language commonly used in hardware flows (Python, Tcl, Perl, C++, or Bash).
- Motivation to learn industry-standard EDA tools (Synopsys, Cadence) and investigate root causes of physical-design issues.
- Authorization to work in India; employment contingent on background checks and export-control eligibility or required approvals.
Education Requirements
Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field; or equivalent practical experience. Relevant coursework, projects, or internships in VLSI/ASIC design are expected. New graduates with excellent academic records may be considered.
About the Company
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.
