Engineer I
Work on design and verification of digital IPs, CPUs, subsystems and peripherals within SiFive’s Bengaluru engineering team focused on RISC‑V compute platforms.
Implement scalable RTL and verification testbenches, collaborate with cross‑functional teams, and help deliver silicon‑ready digital IP.
Entry-level — minimum 1+ years of related engineering experience.
Primary responsibilities include design and verification tasks and implementing testbenches.
Must-have technical skills and abilities.
Nice-to-have:
Minimum Bachelor's or Master's degree in Engineering (e.g. Electrical Engineering, Computer Engineering or related technical field). The posting references knowledge areas including computer architecture, digital electronics, VLSI and circuit/semiconductor devices. No certifications or explicit "equivalent experience" language were specified.
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.
