Engineer, Design

Job Title

Engineer, Design

Role Summary

Senior logic design engineer responsible for definition, implementation, verification, and silicon validation of NAND Flash logic features within the Non-Volatile NAND Design Engineering group (NVE Engineering) in Avezzano, Italy.

Act as technical owner for complex logic functionality, collaborating with architecture, firmware, datapath, analog, test and manufacturing teams to ensure robust, manufacturable and reliable solutions across technology generations.

Experience Level

Senior-level; no specific years-of-experience requirement stated.

Responsibilities

Primary responsibilities include ownership from specification through silicon validation and cross-functional coordination.

• Own end-to-end development of logic features: architecture definition, RTL implementation, verification, and post-silicon validation.
• Translate system and firmware requirements into micro-architecture specifications and digital implementations.
• Develop high-quality RTL and drive verification (block, subsystem, full-chip), coverage, and post-layout validation.
• Collaborate with multi-functional teams to define interfaces and optimize performance, power, and reliability.
• Support silicon bring-up, debug, root-cause analysis, yield learning, and product ramp activities.

Requirements

Must-have technical skills and experience required for the role.

• Strong experience in digital logic design and verification for complex SoCs or memory products.
• Hands-on experience with RTL design, gate-level verification, and simulation methodologies.
• Solid understanding of system-level and micro-architectural trade-offs (performance, power, reliability).
• Proven communication and problem-solving skills; ability to work effectively in global multi-functional teams.
• Experience supporting silicon bring-up, validation, debug, and root-cause analysis.

Nice-to-have:

• Experience with NAND Flash or other non-volatile memory technologies.
• Familiarity with design automation and scripting (e.g., Python) or AI-assisted design approaches.
• Understanding of physical design flows and layout constraints.
• Experience with gate-level/post-layout validation flows and full-chip integration verification.

Education Requirements

M.S. or Ph.D. in Electrical Engineering, Electronics, or a related field (listed as minimum qualifications).

Estimated base salary range: 34,000 EUR - 57,000 EUR per year (posted range). For application assistance or reasonable accommodations contact HRsupport_EMEA@micron.com. For benefits and privacy information see the company's EMEA Benefits and privacy notices.

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About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.