Engineer, Defect Reduction & Yield Enhancement
Analog DevicesJob Title
Engineer, Defect Reduction & Yield Enhancement
Role Summary
Work in ADI's Front-End Fab Quality team at the wafer fabrication facility in Camas, WA to identify, contain, and eliminate yield-limiting defect mechanisms. The role partners with process, equipment, integration, and operations teams to improve defect control and increase wafer yield.
Experience Level
Entry-level (minimum 2 years relevant experience). The role expects demonstrated experience in defect reduction and yield enhancement in semiconductor process flows.
Responsibilities
Primary responsibilities focus on defect control, excursion response, data-driven improvement, and cross-functional execution.
- Own defect control across multiple semiconductor process flows; monitor SPC trends and run correlation/commonality analyses.
- Support defect excursion investigations: data pull/analysis, containment documentation, and disposition for discrepant material.
- Execute defect reduction initiatives using Pareto and yield-kill-ratio analysis; develop and maintain out-of-control action plans (OCAPs).
- Support performance and monitoring of defect inspection and SEM review tools across darkfield/brightfield AOI and SEM platforms.
- Collaborate with Integration, Process, Equipment, and Operations to plan experiments, perform segmentation/spatial signature analysis, and propose process optimizations.
- Analyze defect and yield data using KLARITY ACE or similar software and present clear written and verbal findings.
- Document and share best-known methods (BKMs) and support technician training during project execution.
Requirements
Must-have skills and experience for successful performance in the role; preferred items listed separately.
- Minimum 2 years experience driving defect reduction and yield enhancement in CMOS/BiCMOS or bipolar technologies and semiconductor unit processes.
- Strong written, verbal, and presentation communication skills.
- Strong analytical and problem-solving skills; able to make data-driven decisions and drive projects to closure while managing shifting priorities.
- Statistical analysis experience (t-test, ANOVA) and familiarity with JMP or similar statistical software.
- Experience with SPC, correlation/commonality analysis, Pareto and yield-kill-ratio analyses.
- Ability to support metrology and inspection tools from a process and monitoring perspective (recipe robustness, matching checks, monitoring plans).
- Nice-to-have: Experience with defect inspection/review tools and defect-to-sort correlation tools (see Preferred Qualifications).
Education Requirements
B.S. or M.S. in Electrical Engineering, Electronics Engineering, Chemical Engineering, Materials Science, Device Physics, or a related technical field.
About the Company
Company: Analog Devices
Headquarters: Norwood, Massachusetts, USA
Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.
