Emulation Front-End Infrastructure Engineer

Job Title

Emulation Front-End Infrastructure Engineer

Role Summary

Work on NVIDIA's Emulation Infrastructure team to build and maintain front-end compilation, synthesis, and flow infrastructure for hardware emulation platforms. The role focuses on enabling reliable pre-silicon validation by improving automation, scalability, and observability of compilation and synthesis flows.

Experience Level

Mid-level — typical candidates have 3–7 years of relevant experience. This posting requests experienced engineers able to operate independently and partner with design teams and EDA vendors.

Responsibilities

Key responsibilities include maintaining and improving front-end flows and diagnosing complex compilation issues.

• Own and evolve front-end compilation, synthesis, and flow infrastructure for emulation platforms.
• Develop, maintain, and automate compilation and synthesis flows using scripting and EDA tools.
• Run, analyze, and debug compilation and synthesis regressions; support RTL design stability with logic designers.
• Apply AI techniques to improve automation, classify failures, and accelerate root-cause analysis.
• Evaluate, deploy, and support front-end EDA tools and methodologies.
• Diagnose complex compilation, elaboration, synthesis, and implementation issues with internal teams and vendors.
• Improve performance, reliability, scalability, usability, and observability of flows across large-scale environments.

Requirements

Must-have technical skills, tools, and experience.

• Experience with RTL compilation, synthesis, front-end implementation, and flow automation.
• Proficiency reading, debugging, and modifying Verilog and SystemVerilog RTL for emulation.
• Strong understanding of RTL elaboration, synthesis, logic optimization, and front-end methodologies.
• Hands-on experience with front-end EDA tools (examples: Synopsys Design Compiler, ZeBu Compiler, Cadence HDL-ICE).
• Strong automation and scripting skills (Python, Perl, Tcl, shell scripting, Makefile-based flows).
• Experience running high volumes of jobs on distributed compute farms and using workload schedulers (LSF, Slurm) and revision-control systems (Perforce, Git).
• Strong debugging, problem-solving, communication, and cross-functional collaboration skills.

Nice-to-have:

• Experience with hardware-emulation compilation flows and runtime bring-up or debugging.
• Deep expertise with Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE.
• Experience building scalable regression, reporting, monitoring, and flow-debug infrastructure.
• Experience building AI/LLM agents or automation to classify tool logs, diagnose failures, and drive recovery.
• Experience partnering with EDA vendors to resolve complex tool or performance issues.

Education Requirements

BS in Electrical Engineering, Computer Engineering, or a related field with 5+ years of relevant experience; or MS in a related field with 3+ years of relevant experience. Equivalent practical experience is explicitly accepted.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.