Emulation Engineer - Hardware Prototyping (HAPS)

Job Title

Emulation Engineer - Hardware Prototyping (HAPS)

Role Summary

Hands-on role to bring RTL designs to working multi-FPGA prototypes using Synopsys HAPS and similar platforms. You will enable firmware, driver, and software teams by partitioning designs, closing timing, bringing up interfaces, debugging across FPGA boundaries, and automating platform flows.

Experience Level

Mid-level (typical candidates have practical FPGA prototyping and system-debug experience; 3–7 years is common for this class of role).

Responsibilities

Deliver and support FPGA-based prototypes that enable pre-silicon software and system validation.

• Own HAPS bring-up: partition designs, implement multi-FPGA timing closure, manage clocking and memory mapping, and assemble full-chip prototypes.
• Enable new subsystem partitions so software and firmware teams can start earlier.
• Support internal users: triage failures, determine fault origin (user, RTL, or platform), and provide reproducible test setups.
• Debug cross-FPGA issues using waveform capture, protocol analysis, and custom tooling.
• Bring up and model interfaces: PCIe, Ethernet, HBM/memory models, JTAG, I2C, UART, QSPI, and physical bridges.
• Build scalable flows: automate builds, regressions, image delivery, and user self-service where possible.
• Collaborate across design, DV, silicon validation, performance, firmware, software, and external tool vendors.

Requirements

Must-have practical skills listed first; optional items that strengthen a candidate are under "Nice-to-have."

• Must-have: Hands-on FPGA prototyping experience (HAPS, Protium, proFPGA, S2C or equivalent) including partitioning, synthesis, timing closure, bring-up, and debug.
• Must-have: Strong SystemVerilog/Verilog knowledge and understanding of FPGA-synthesis-friendly coding.
• Must-have: Solid C/C++ and Linux system development experience.
• Must-have: Scripting for automation (Python, TCL, shell).
• Must-have: Ability to debug complex failures in unfamiliar code and across tool/platform boundaries for users who need quick answers.
• Nice-to-have:
  • Experience with ProtoCompiler, Vivado, or Synopsys prototyping flows.
  • Firmware, driver, or bootloader bring-up on pre-silicon platforms.
  • Experience with emulation platforms (ZeBu, Palladium, Veloce) in addition to prototyping.
  • UVM verification environments, DFT, testbench modeling, and waveform tools (Verdi, SimVision).
  • Cluster/job scheduling (SLURM) and CI system experience.

Education Requirements

Not specified.

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.