Embedded FPGA Engineer

Job Title

Embedded FPGA Engineer

Role Summary

Design, implement, and validate FPGA-based digital signal processing (DSP) components for embedded SOSA/VPX systems. Work with HDL and HLS toolchains to convert DSP algorithms into resource-efficient, real-time hardware blocks and integrate those designs with software, firmware, and system architectures.

Member of an engineering team supporting RF signal processing on modern FPGAs; requires independent problem-solving, cross-functional collaboration, and proactive learning of new development acceleration tools.

Experience Level

Mid-level — typically requires 3+ years of FPGA or software-defined radio (SDR) development experience.

Responsibilities

Deliver FPGA DSP capabilities from algorithm to hardware, collaborate across disciplines, and ensure real-time performance and reliability.

• Design and implement FPGA-based DSP systems using HDL and Vitis HLS.
• Convert and optimize DSP algorithms (filtering, detection, synchronization, modulation/demodulation, transforms) into high-throughput hardware blocks.
• Integrate FPGA designs with software, firmware, and broader system architectures.
• Test, verify, and validate FPGA designs for functional correctness and real-time performance.
• Optimize timing, area, power, and throughput using HLS directives and traditional FPGA techniques.
• Develop reusable hardware IP blocks and scalable DSP pipelines.
• Maintain design documentation: block diagrams, interfaces, design notes, and user/workflow guides.
• Identify and evaluate new techniques and tools to improve FPGA development efficiency and system capability.

Requirements

Key technical and security requirements. Education requirements are listed separately below.

• 3+ years of experience developing FPGA or SDR solutions.
• Proficiency with Verilog, VHDL, SystemVerilog, or HLS; experience with simulation, synthesis, fitting, timing analysis, implementation, and debug.
• Experience with Xilinx toolchains such as Vitis and Vivado; scripting experience (for example TCL).
• Experience with Python, C++, MATLAB, or similar languages used for modeling DSP algorithms.
• Experience with Linux/UNIX development environments and scripting.
• Solid understanding of digital design fundamentals, streaming architectures, pipelining, buffering, and datapath timing.
• Ability to read hardware schematics and use lab equipment (logic analyzers, oscilloscopes, spectrum analyzers).
• Familiarity with Agile processes and tools such as Jira and Confluence.
• Ability to obtain a TS/SCI clearance; candidates will undergo a security investigation.

Nice-to-have:

• Experience with SOSA/VPX systems and porting vendor RF transceiver reference designs to FPGA platforms.
• Experience designing HLS-friendly algorithms and optimizing C/C++ for hardware translation.
• Experience with RF testing and high-speed interfaces (AXI-Stream, AXI-Lite, DMA, custom streaming buses).
• Experience with GPU acceleration, parallel computing, or high-bandwidth data processing.
• Familiarity with AI-driven automation for FPGA workflows or modern agentic engineering tools.

Education Requirements

Required: Bachelor's degree in Electrical Engineering or Computer Engineering. Preferred: Master's degree in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Booz Allen & Hamilton

Headquarters: McLean, Virginia, United States

Management and technology consulting firm providing analytics, engineering, cyber, digital, and mission services to U.S. government agencies (especially defense and intelligence) and commercial clients.