Job Title
Embedded FPGA Engineer
Role Summary
Design, implement, and validate FPGA-based digital signal processing (DSP) components on embedded SOSA/VPX platforms. Work with cross-functional teams to integrate FPGA designs with software, firmware, and system architectures for real-time RF signal processing.
Experience Level
Mid-level β typically requires 3+ years of experience designing or deploying FPGA or SDR solutions.
Responsibilities
Primary responsibilities include implementing DSP algorithms and delivering production-ready FPGA designs.
- Design and implement FPGA-based DSP systems using HDL, Vitis HLS, and modern FPGA toolchains.
- Develop and optimize DSP algorithms (filtering, detection, synchronization, modulation/demodulation, transforms) into high-throughput, resource-efficient hardware blocks.
- Integrate FPGA designs with software, firmware, and larger system architectures; collaborate with cross-functional teams.
- Test, verify, and validate FPGA designs for functional correctness, stability, and real-time performance.
- Optimize designs for timing, area, power, and throughput using HLS directives and FPGA workflows.
- Create reusable hardware IP blocks and scalable DSP pipelines.
- Maintain design documentation: block diagrams, interface definitions, user guides, and workflow notes.
- Evaluate and recommend techniques or tools that improve FPGA development efficiency or system capability.
Requirements
Must-have technical skills and environment experience. Preferred items summarized separately.
- 3+ years experience working on FPGA or SDR solutions (design, implementation, deployment).
- Hands-on with HDL and HLS: Verilog, VHDL, SystemVerilog, Vitis HLS.
- Experience with Xilinx toolchains (Vitis, Vivado) and FPGA toolflow: simulation, synthesis, timing analysis, implementation, debug.
- Proficiency with Python and/or C++ and MATLAB for DSP modeling and tool automation.
- Experience in Linux/UNIX development environments and scripting (e.g., TCL for tool automation).
- Solid digital design fundamentals: streaming architectures, pipelining, buffering, datapath timing.
- Ability to read schematics and use lab equipment such as logic analyzers, oscilloscopes, and spectrum analyzers.
- Familiarity with Agile processes and tools (Jira, Confluence).
- Ability to obtain a TS/SCI security clearance (candidates will be subject to investigation).
Education Requirements
Required: Bachelor's degree in Electrical Engineering or Computer Engineering. Preferred: Master's degree in Electrical Engineering, Computer Engineering, or a related technical field. (The posting did not list an "equivalent experience" clause.)
Nice-to-have / Preferred Qualifications
- Experience with SOSA / VPX systems and embedded RF platforms.
- Experience developing HLS-friendly algorithms and optimizing C/C++ for hardware translation.
- Experience porting vendor RF transceiver reference designs (RTL, IP cores, drivers) to FPGA boards and custom platforms.
- RF testing experience and familiarity with high-speed digital interfaces (AXI-Stream, AXI-Lite, DMA).
- Experience with GPU acceleration, parallel computing, or high-bandwidth data processing.
- Experience with requirements capture, development roadmaps, and supporting Agile workflows.
- Familiarity with AI-driven automation or agentic engineering workflows for FPGA design, simulation, synthesis, or testing.
Other Notes
Applicants will be subject to a security investigation for access to classified information. This position is based in McLean, VA and primarily performed onsite. Compensation is determined by location and experience; a projected range was provided by the employer.
About the Company
Company: Booz Allen & Hamilton
Headquarters: McLean, Virginia, United States
Management and technology consulting firm providing analytics, engineering, cyber, digital, and mission services to U.S. government agencies (especially defense and intelligence) and commercial clients.

Date Posted: 2026-07-28