Embedded FPGA Engineer

Job Title

Embedded FPGA Engineer

Role Summary

Design, implement, and deploy FPGA-based digital signal processing (DSP) functions on embedded SOSA/VPX platforms. Work as part of a cross-functional engineering team to integrate FPGA designs with software and firmware, validate real-time performance, and deliver production-capable hardware IP.

Work involves HDL and HLS development, optimization for timing/area/power, system integration, and documentation of design artifacts.

Experience Level

Mid-level — requires 3+ years of FPGA or SDR development experience.

Responsibilities

Implement and optimize FPGA DSP systems and integrate them into larger system architectures.

• Design and implement FPGA-based DSP using HDL, Vitis HLS, and modern FPGA toolchains.
• Develop and optimize DSP algorithms (filtering, detection, synchronization, modulation/demodulation, transforms) into high-throughput, resource-efficient hardware blocks.
• Collaborate with software, firmware, and systems engineers to integrate FPGA designs.
• Test, verify, and validate FPGA designs for functional correctness and real-time performance.
• Optimize designs for timing, area, power, and throughput using HLS directives and traditional FPGA workflows.
• Develop reusable hardware IP blocks to enable scalable DSP pipelines.
• Maintain design documentation: design notes, block diagrams, interface definitions, and user guides.
• Identify and adopt techniques or tools that improve FPGA development efficiency and DSP performance.

Requirements

Must-have technical skills, tools, and clearances.

• 3+ years developing FPGA or SDR solutions.
• Experience with Verilog, VHDL, SystemVerilog, or HLS and associated simulation, synthesis, timing analysis, and debug flows.
• Experience with Xilinx toolchains (Vitis, Vivado) and scripting (e.g., Tcl).
• Proficiency with Python, C++ (embedded), MATLAB, or similar languages used for DSP modeling.
• Experience with Linux/UNIX development environments and scripting.
• Solid understanding of digital design fundamentals: streaming architectures, pipelining, buffering, and data-path timing.
• Ability to read hardware schematics and operate lab equipment (logic analyzers, oscilloscopes, spectrum analyzers).
• Experience with Agile processes and tools (e.g., Jira, Confluence).
• Ability to obtain a TS/SCI security clearance.

Nice-to-have:

• Experience implementing or prototyping DSP algorithms in hardware and optimizing C/C++ for HLS translation.
• Experience with SOSA/VPX systems and porting vendor RF transceiver reference designs (RTL, IP cores, drivers) to FPGA platforms.
• RF testing experience and familiarity with high-speed digital interfaces (AXI-Stream, AXI-Lite, DMA, custom streaming buses).
• Experience with GPU acceleration, parallel computing, or high-bandwidth data processing.
• Familiarity with AI-driven or agentic engineering workflows for FPGA design, simulation, synthesis, or testing.

Education Requirements

Required: Bachelor's degree in Electrical Engineering or Computer Engineering. Preferred: Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Booz Allen & Hamilton

Headquarters: McLean, Virginia, United States

Management and technology consulting firm providing analytics, engineering, cyber, digital, and mission services to U.S. government agencies (especially defense and intelligence) and commercial clients.