Embedded FPGA Engineer

Job Title

Embedded FPGA Engineer

Role Summary

Design and implement FPGA-based digital signal processing (DSP) for embedded SOSA/VPX systems using modern FPGA toolchains and HLS. Work on algorithm-to-hardware translation, integration with software/firmware, and real-time system validation as part of a cross-functional engineering team.

Experience Level

Mid-level — typically requires 3+ years of FPGA or SDR development experience.

Responsibilities

Primary engineering responsibilities include implementation, optimization, and verification of FPGA DSP systems and integration with larger system architectures.

• Design and implement FPGA-based DSP systems using HDL (Verilog/VHDL/SystemVerilog), Vitis HLS, and modern FPGA toolchains.
• Translate and optimize DSP algorithms (filtering, detection, synchronization, modulation/demodulation, transforms) into high-throughput, resource-efficient hardware.
• Integrate FPGA designs with software, firmware, and system interfaces; collaborate with cross-functional teams.
• Test, verify, and validate designs to meet functional correctness and real-time performance constraints.
• Optimize for timing, area, power, and throughput using HLS directives and traditional FPGA workflows.
• Develop reusable hardware IP blocks and scalable DSP pipelines.
• Maintain design documentation: block diagrams, interface definitions, user guides, and workflow notes.
• Identify and evaluate new techniques or tools to improve FPGA development efficiency and system capabilities.

Requirements

Must-have technical skills and experience; separate section for additional desirable skills.

• 3+ years of experience developing FPGA or SDR solutions.
• Hands-on experience with HDL (Verilog, VHDL, SystemVerilog) and/or HLS, plus simulation, synthesis, timing analysis, and debug workflows.
• Experience with Xilinx toolchains (Vitis, Vivado) and related scripting (e.g., Tcl).
• Proficiency with Python, C++ (embedded), or MATLAB for DSP modeling and testing.
• Comfortable in Linux/UNIX development environments and using scripting languages for automation.
• Understanding of digital design fundamentals: streaming architectures, pipelining, buffering, and data-path timing.
• Ability to read hardware schematics and use lab equipment (logic analyzers, oscilloscopes, spectrum analyzers).
• Ability to obtain and maintain a TS/SCI security clearance.

• Experience implementing or prototyping DSP algorithms in hardware and optimizing C/C++ for HLS translation.
• Familiarity with SOSA/VPX systems and porting vendor RF transceiver reference designs to custom platforms.
• Experience with RF testing and high-speed digital interfaces (AXI-Stream, AXI-Lite, DMA).
• Experience with GPU acceleration, parallel computing, or high-bandwidth data processing workflows.
• Familiarity with AI-driven or agentic engineering workflows for FPGA design, simulation, synthesis, or testing.

Education Requirements

Bachelor's degree in Electrical Engineering or Computer Engineering required. A Master’s degree in Electrical Engineering, Computer Engineering, or a related field is preferred.

About the Company

Company: Booz Allen & Hamilton

Headquarters: McLean, Virginia, United States

Management and technology consulting firm providing analytics, engineering, cyber, digital, and mission services to U.S. government agencies (especially defense and intelligence) and commercial clients.