Job Title
EDA Tools SW Engineer
Role Summary
Lead technical contributor within Design Enablement (DTP) for Intel Foundry focused on customer solutions for ASIC tools/flows, physical verification/runsets, tape-in verification, and IP sign-off. Work cross-functionally with DTP teams, EDA vendors, and internal/external design teams to define scope, plan execution, and deliver production-quality solutions.
Manage and develop an engineering team, provide technical leadership and mentoring, and drive delivery against schedule, quality, and cost targets.
Experience Level
Mid-level / Mid-Career. Typical experience in this role is approximately 6+ years relevant engineering experience; see Education Requirements for degree-to-experience mapping.
Responsibilities
Primary responsibilities include customer engagement, technical leadership, and delivery of design-enablement solutions.
- Engage customers to capture critical requirements and translate them into technical scope and deliverables.
- Collaborate with internal partners, EDA vendors, and product teams to define and execute solutions.
- Lead and grow a high-performing engineering team: set priorities, allocate resources, mentor engineers, and drive accountability.
- Plan and coordinate execution of ASIC tool flows, physical verification/runsets, and tape-in verification activities.
- Drive problem resolution and technical decisions across organizational boundaries.
- Ensure delivery meets schedule, quality, and cost targets and promote continuous improvement.
- Represent the team with customers and stakeholders to resolve complex design or technology issues.
Requirements
Must-have experience and competencies (candidates should meet multiple items below):
- Significant hands-on experience (6+ years) in two or more of the areas listed below.
- Technical management or lead experience mentoring or leading medium-sized engineering teams.
- Experience with test-chip physical verification and tape-in processes.
- Knowledge of Intel and/or external foundry process technologies at advanced nodes.
- Industry experience supporting ASIC physical design and/or physical verification/runsets and EDA tools for advanced technology nodes.
- Experience addressing technology challenges and process changes that impact physical design, physical verification, and PDK components.
- Behavioral: strong customer focus, analytical problem solving, effective cross-functional communication, and demonstrated ability to influence results.
Preferred:
- Experience in advanced-node semiconductor design and verification methodologies.
- Proven track record working with customers and stakeholders to resolve complex design and technology challenges.
Education Requirements
Degree requirement mapping: BS degree with 10+ years' experience, MS degree with 8+ years' experience, or PhD degree with 6+ years' experience in Electrical Engineering, Computer Engineering, or a related technical field.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

Date Posted: 2026-08-04