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DSP / NPU Senior Staff Design Verification Engineer

Qualcomm
June 03, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

DSP / NPU Senior Staff Design Verification Engineer

Role Summary

Lead design verification for complex DSP and NPU IP across IP, subsystem and SoC levels. Work with architecture, implementation, power, post-silicon and back-end teams to ensure functional correctness and product quality.

Part of the DSP team delivering high-performance processor/NPU cores for mobile, AI, automotive and related SoC products.

Experience Level

Senior β€” typically requires 12+ years of design verification experience in processor/ASIC domains.

Responsibilities

Primary duties include planning and executing verification activities and improving verification infrastructure.

  • Lead end-to-end design verification for DSP/NPU IP, and escalate issues to subsystem and SoC levels as needed.
  • Architect, implement and maintain SystemVerilog/UVM testbench architectures and verification environments.
  • Develop verification plans, tests, automation and coverage strategies; meet coverage and quality targets.
  • Perform simulations, debug RTL and gate-level issues, and support simulation acceleration and emulation.
  • Execute power-aware RTL and gate-level verification and validate UPF-related flows.
  • Collaborate with cross-functional teams (architecture, implementation, power, post-silicon, backend) to resolve issues and drive delivery.

Requirements

Must-have technical skills and experience.

  • Extensive experience in processor/ASIC design verification (senior-level, target role 12+ years).
  • Strong background in digital design and processor architecture; excellent analytical and debugging skills.
  • Expertise in SystemVerilog testbench architecture and UVM/OVM methodologies.
  • Experience with industry simulators (Synopsys, Mentor, Cadence) and gate-level simulation/debug (timing-annotated, power-aware).
  • Scripting and automation skills: Python, Perl, Shell, Makefiles.
  • Proficient in HDLs/HVLs such as SystemVerilog and Verilog; familiarity with SystemC is a plus.
  • Ability to develop or review C-based and assembly-level testcases is preferred.
  • Strong communication and collaboration skills to work across global teams.

Nice-to-have:

  • Experience with formal verification and assertions.
  • Exposure to power-aware implementation and verification using UPF.
  • Experience verifying processor subsystems and building validation/automation suites.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with 6+ years of hardware engineering or related experience; OR Master's degree in those fields with 5+ years of related experience; OR PhD in those fields with 4+ years of related experience.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-06-03