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DSP / NPU Design Verification Sr Lead Engineer

Qualcomm
June 08, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

DSP / NPU Design Verification Sr Lead Engineer

Role Summary

Lead design verification activities for Qualcomm DSP/NPU IP, working with global architecture, implementation, power, post-silicon and backend teams to ensure high-quality silicon delivery. The role focuses on testbench architecture, verification methodologies, automation, and advanced verification techniques across IP, subsystem and SoC levels.

Experience Level

Senior level. The posting indicates a target range of 2–8 years of design verification experience; minimum qualifications specify 1–3+ years depending on degree level.

Responsibilities

Principal responsibilities for this role include:

  • Drive and own IP-level design verification and collaborate on subsystem/SoC verification and silicon bring-up.
  • Architect, implement and improve SystemVerilog/UVM testbench infrastructure and verification environments.
  • Develop verification plans, implement coverage-driven tests, and meet coverage goals.
  • Create and deploy verification automation and tools to improve quality and efficiency.
  • Perform simulations, debug RTL and gate-level failures, and support timing-annotated and power-aware verification.
  • Use assertions, formal/static property checking, HW–SW co-verification, emulation, and simulation acceleration as required.
  • Support gate-level simulation bring-up and power-aware RTL verification using UPF flows where applicable.
  • Collaborate across architecture, implementation, power and post-silicon teams to achieve product delivery targets.

Requirements

Must-have and preferred technical skills for successful candidates:

  • Experience in processor/ASIC design verification with strong digital design and processor architecture knowledge (role indicates 2+ years experience in verification).
  • Practical expertise with SystemVerilog testbench architecture and UVM/OVM methodologies.
  • Familiarity with verification tools from Synopsys/Mentor/Cadence and gate-level simulation/debug.
  • Scripting and automation skills (Python, Perl, Shell, Makefiles).
  • Strong analytical and debugging skills and solid understanding of OOP concepts for verification environments.
  • Preferred: experience writing C and assembly testcases, SystemC, HVLs, and building validation suites and automation frameworks.
  • Preferred: knowledge of power-aware verification, UPF flows, formal methods/assertions, and verification of processor subsystems.
  • Excellent interpersonal and communication skills to work effectively with global teams.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with 3+ years' relevant experience; OR Master's degree in these fields with 2+ years; OR PhD in these fields with 1+ year. The posting presents these degree-based options as alternatives to equivalent work experience.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-06-08