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DRAM Design Tech Layout Engineer

Micron Technology
August 22, 2026
Full-time
On-site
Jalisco, MX
Physical Design Jobs, Level - Mid-Career

Job Title

DRAM Design Tech Layout Engineer

Role Summary

Responsible for translating schematics into physical layouts for DRAM products, generating mask-ready layouts, and ensuring layouts meet engineering and process requirements for assigned DRAM blocks.

Work within the DRAM Design Engineering Group and with global design, process and CAD teams to apply layout techniques, run verification, and support tapeout activities.

Experience Level

Mid-level β€” typically requires 3+ years of relevant layout experience.

Responsibilities

Key delivery and collaboration responsibilities for the role:

  • Design and develop IP/block layouts for DRAM chips and deliver block-level layouts on schedule with required quality.
  • Perform physical verification tasks including LVS, DRC, EM and quality checks; document results.
  • Optimize layout area and routing for performance, power, and yield; apply design rules and reliability practices.
  • Plan layout work, estimate area/time, schedule tasks, and coordinate resources across multiple projects.
  • Lead and mentor junior team members on sub-block layouts and review their work.
  • Coordinate with global engineering teams (design, CAD, process) to resolve issues and support tapeout.

Requirements

Must-have technical skills and experience. Preferred items noted separately.

  • 3+ years of layout experience in advanced CMOS processes; proven IP layout development and physical verification for complex designs.
  • Expertise in layout area and routing optimization, design rules, yield and reliability issues.
  • Solid understanding of layout fundamentals: electromigration, latch-up, coupling/crosstalk, IR-drop, parasitics, matching, shielding.
  • Familiarity with schematics and ability to collaborate with circuit designers and CAD teams; understand layout effects on speed, capacitance, power and area.
  • Experience with Cadence Virtuoso (schematic and layout) and verification tools; experience with Mentor Calibre or equivalent physical verification tools.
  • Strong problem-solving skills for area, power, performance and physical verification challenges.
  • Leadership and multitasking ability; experience guiding and supporting team members in a team environment.
  • Nice-to-have: SKILL coding and layout automation experience; strong verbal and written communication skills.

Education Requirements

BE/BTech or MTech in Electronics/VLSI or equivalent. Exceptionally talented Diploma holders in electronic or VLSI engineering may be considered; equivalent practical experience is acceptable.


About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

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Date Posted: 2026-08-22