DRAM Circuit Design, Staff

Job Title

DRAM Circuit Design, Staff

Role Summary

Staff-level ASIC/IC engineer responsible for DRAM circuit and IP development within the ASICS Engineering group. The role focuses on architecture, circuit design (digital and/or analog), verification, validation, implementation and documentation of high-performance, low-power blocks and SoCs.

Experience Level

Senior / Staff engineering level. Preferred experience: 6+ years of ASIC design, verification, validation or integration experience; role works independently and provides technical guidance to others.

Responsibilities

Primary responsibilities include design, verification and cross-functional delivery of DRAM-related IP and ASIC blocks.

• Define, model, design, optimize, verify, validate, implement and document IP (block/SoC) for DRAM circuits and related subsystems.
• Create architectures, circuit specifications, logic designs and system simulations from system-level requirements.
• Evaluate full design flow: synthesis, place-and-route, timing and power analysis, and verification; or equivalent custom circuit/layout flow.
• Use EDA flows and tools (e.g., RTL-to-GDS flows, Virtuoso) to execute designs and bring-up blocks.
• Collaborate with software, hardware, product and program teams to define and execute implementation strategies.
• Write and review technical documentation; present and defend technical decisions to stakeholders.
• Mentor and provide guidance to team members; make decisions that affect work beyond the immediate group.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven ASIC/IC circuit design experience covering design, verification, validation or integration of complex blocks.
• Experience with architecture and design tools and flows (RTL-to-GDS, Virtuoso or similar).
• Familiarity with design verification methods and EDA toolchains.
• Scripting and programming experience (examples: Python, Tcl, Perl) to automate flows and verification tasks.
• Strong written and verbal communication skills; ability to work independently and influence cross-functional teams.

Nice-to-have:

• Experience interacting with senior leadership on technical decisions.
• Prior DRAM or memory-subsystem design experience.
• Hands-on experience with physical design flows and power/timing optimization.

Education Requirements

Minimum qualifications specify degree + experience combinations: Bachelor's degree in Science, Engineering, or related field with 4+ years of relevant ASIC experience; OR Master's degree in Science, Engineering, or related field with 3+ years; OR PhD with 2+ years. Preferred: Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. (The posting ties required experience to degree level rather than listing a single years-of-experience floor.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.