Director Silicon Performance and Design Execution- GPU

Role Summary

The Director of Silicon Design Engineering is responsible for owning end-to-end silicon performance and design execution across post-silicon phases. This role provides technical and organizational leadership for system-level performance attainment, hardware/software optimizations, silicon debug, and sustained performance delivery for complex SoCs and accelerators.

Experience Level

Level - Senior

Responsibilities

Technical Leadership:

• Own system-level performance attainment and HW/SW optimization to improve out-of-box and sustained performance across silicon products.
• Lead post-silicon debug, regression, performance analysis, and optimization efforts to achieve committed product targets.
• Establish and evolve methodologies for power and performance modeling, validation, and silicon bring-up.

Execution & Delivery:

• Lead execution across multiple silicon programs, ensuring performance and power goals are met on schedule.
• Partner closely with architecture, RTL design, verification, firmware, system software, and product management teams.
• Identify and mitigate technical and execution risks across the silicon lifecycle.
• Drive continuous improvement in tools, flows, and best practices for silicon design and performance engineering.

People & Organizational Leadership:

• Build, scale, and lead a global team of silicon design and performance engineers.
• Manage senior technical leaders (Fellows, Senior Fellows, Directors) and develop succession plans.
• Set clear technical direction, performance expectations, and career development paths for the organization.
• Foster a culture of technical excellence, accountability, and collaboration.

Cross-Functional & External Engagement:

• Serve as a primary technical interface with internal senior leadership, including Directors, Senior Directors, Fellows, and Engineering VPs.
• Engage externally with customer platform engineering teams, engineering leads, and product stakeholders as needed.
• Represent silicon design and performance perspectives in executive reviews and customer engagements.