Director - R&D Technical Head

Job Title

Director - R&D Technical Head

Role Summary

Lead Semtech's India R&D engineering organization for end-to-end chip design across SoC, analog, digital, packaging, verification and DFT. Own the technical strategy, toolchain selection, and execution to deliver silicon on advanced process nodes.

Manage engineering leads and managers, coordinate cross-vertical projects from architecture to tapeout, and represent technical status to senior leadership and external partners.

Experience Level

Senior — requires extensive senior leadership experience; posting requests 20+ years in the semiconductor/VLSI industry with at least 5 years in senior engineering leadership or technical management.

Responsibilities

Accountable for technical direction, team leadership, and successful delivery of multiple chip projects. Key responsibilities include:

• Define and own chip design strategy, methodology, and multi-year technology roadmap across design verticals.
• Set design standards, quality benchmarks, and PPA targets to maximize first-silicon success.
• Evaluate and adopt EDA toolchains and emerging design methodologies to maintain competitive advantage.
• Provide architectural guidance for SoC partitioning, IP integration, mixed-signal co-design, and DFM.
• Manage and coach vertical leads and engineering managers; establish goals and development plans for 12–20+ reports.
• Monitor project status, interdependencies, resource constraints, and technical risks; drive issue resolution.
• Lead tapeout readiness reviews, silicon bring-up planning, and act as escalation point for critical design issues.
• Prepare and present R&D status, technical risk assessments, and resource dashboards to senior leadership.
• Engage with foundries and IP vendors to optimize design flows and process node qualifications.

Requirements

Must-have technical skills, experience, and leadership capabilities.

• 20+ years in the semiconductor / VLSI industry with proven senior technical leadership and delivery track record.
• Minimum 5 years in a senior engineering leadership or technical management role.
• Hands-on expertise across the complete chip design flow: SoC architecture, physical design, analog design, product & test engineering, packaging, verification (Digital RTL), and DFT.
• Proven experience managing and delivering multiple concurrent chip design projects from specification through GDS tapeout.
• Deep proficiency with industry-standard EDA tools (Cadence, Synopsys toolchains such as Innovus/Virtuoso, Design Compiler/IC Compiler/PrimeTime).
• Strong written and verbal English communication; experience presenting complex technical concepts to executives.
• Preferred (nice-to-have): experience leading 25+ engineer R&D organizations across distributed teams, advanced packaging/chiplet exposure, AI/ML-assisted EDA familiarity, automotive/high-reliability design experience, patents/publications, foundry collaboration on advanced nodes, and HR exposure (headcount planning, performance management).

Education Requirements

Bachelor's degree (B.E. / B.Tech) in Electronics & Communication Engineering, Electrical Engineering, VLSI Design, or a closely related field is required; Master’s degree (M.E. / M.Tech / M.S.) is strongly preferred.

About the Company

Company: Semtech

Headquarters: Camarillo, California, USA

Semtech Corporation is a high-performance semiconductor company providing IoT systems and Cloud connectivity solutions. The company focuses on delivering innovative technology solutions that support a smarter, more connected, and sustainable planet, with a dedication to quality across infrastructure, industrial, and consumer markets.